From patchwork Tue May 23 01:03:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 685143 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D997C77B73 for ; Tue, 23 May 2023 01:05:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234587AbjEWBFW (ORCPT ); Mon, 22 May 2023 21:05:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59708 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234633AbjEWBFC (ORCPT ); Mon, 22 May 2023 21:05:02 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0635B10D4; Mon, 22 May 2023 18:04:25 -0700 (PDT) Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34N0odbw014000; Tue, 23 May 2023 01:03:55 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=YNAtIfDbyTq6AP77FsP0kMRe9wGnFsveU/DMFC4Q6s0=; b=fYj0TVAdfL80H4ngLGecWIet0soiXnwoRbBWa73jTs2AVckLW3kFy8k6tSwOk79SEBcl xkNQnVEDK17+lm5vjahNxuTdWXL3OUyzPKjJ0PertfUxvIEIuvocnD8bupWhhY8WUff8 wFLB9CrxCFut4aqj6TOIU3/dj35lSWpP/os4hytt3hzT+UUvFq1DEd/CGg3lDFIKD/CY RnmFdG5vQXSRDo145UARKrgsaksAwFESSk1kzT5uHhP5ts/rEjT270oVDSRPiDYt2YVS 4NkDzDZv006ysDFqlzPOrb5HfRzj1fOOYaKbjjc2FwsK5AP2NyVLbT3UM2CETSRHLZU1 tg== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qr4wh1v1k-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 23 May 2023 01:03:55 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 34N13sB9005759 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 23 May 2023 01:03:54 GMT Received: from hu-bjorande-lv.qualcomm.com (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Mon, 22 May 2023 18:03:54 -0700 From: Bjorn Andersson To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley CC: Michael Turquette , Stephen Boyd , Taniya Das , , , , Subject: [PATCH] dt-bindings: clock: qcom: Accept power-domains for GPUCC Date: Mon, 22 May 2023 18:03:48 -0700 Message-ID: <20230523010348.63043-1-quic_bjorande@quicinc.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: yLzrEIwm5T_FBzc6lJAZBYpMbWjWvuOC X-Proofpoint-GUID: yLzrEIwm5T_FBzc6lJAZBYpMbWjWvuOC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-22_18,2023-05-22_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 clxscore=1011 priorityscore=1501 malwarescore=0 mlxscore=0 suspectscore=0 bulkscore=0 mlxlogscore=999 impostorscore=0 adultscore=0 phishscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305230006 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org In many designs the power-domains provided by the GPU clock controller are powered by some GFX rail, add power-domains as a valid property to allow this to be specified. Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/clock/qcom,gpucc.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml index 1e3dc9deded9..a00216b3b15a 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml @@ -50,6 +50,9 @@ properties: - const: gcc_gpu_gpll0_clk_src - const: gcc_gpu_gpll0_div_clk_src + power-domains: + maxItems: 1 + '#clock-cells': const: 1