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a=openpgp-sha256; l=2624; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=mhqlzFH1ENEoCnsxWClRFARSzrlKXwK9ZxQOza6S9v8=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBkbGglcJDQPJmkkBVVbhOcHOme02dCKUKEan/GDGPp Pa/1bACJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZGxoJQAKCRB33NvayMhJ0ddZD/ 9ey3oj/A8lMAcjhbekcxhNk3mh/hcVlC6qrkSFs/6Scc41lLrF5fSmYLdcKqG9pogdX+9ulRrnc+tx RJCAFel87m9abg90wcfDXZl69H+b4slQnEd7YP6jM8nxHLztDPlAIhZyl97aywKFmxePPvIrQ43ve3 cYtcdcPzWhhSSqXJ8eH6rjPjOdGQjgsipeFqfA3hGvj6mr/jsbfrq3cTS4cnM+zy/HYWHEhCy39WlD i3RwtqaesXE1LBoQST+5CXp3mHdxnsdLD1Oy+kp2W7tjw8Kphbalh8E/Mhal4vgaU7BC7ZrxRJ7Pl2 Yc1+JU/14k6l0MwoP0dEEJWualD2DIRbaxOTfPbdsZ3XfQE8V+r+CdHohnq5x8qowLDp6S60Za+24D ovjKp/kbVN6F0ar+g4QZOb3PZ1N+LfogzGVgCjPiJu+0zISlaK0nOFt59a6viwDg+udUQVWrVsVqMs 7+5b4Ptmsl4OL/amGgsAqtlIy9vmauBhUsOt2TrJ2ZD7ZTP9SuSgCf5gYxSU/p9LD9iWrnQf1VZvHY J2fmtz/3GROfNeB0x2bSqL5Yr+q4eMUFp+uBCZTQ3uw8r1eM4KRkPeKJo5xVVQe5Iv4rJKaH9LY6yY UWCl+FFo5jkKVmZZUC0H+MRl+6A10hlZKUf2RFEeXoqypK3pqrPnPns8+W5Q== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org With support for the QMP combo phy to react to USB Type-C switch events, introduce it as the next hop for the SuperSpeed lanes of the Type-C connector, and connect the output of the DisplayPort controller to the QMP combo phy. This allows the TCPM to perform orientation switching of both USB and DisplayPort signals. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 73 ++++++++++++++++++++++++++++++++- 1 file changed, 71 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts index e931545a2cac..d5aeb7319776 100644 --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts @@ -114,9 +114,18 @@ port@1 { reg = <1>; pmic_glink_ss_in: endpoint { - remote-endpoint = <&usb_1_dwc3_ss>; + remote-endpoint = <&usb_1_qmpphy_out>; }; }; + + port@2 { + reg = <2>; + + pmic_glink_sbu: endpoint { + remote-endpoint = <&fsa4480_sbu_mux>; + }; + }; + }; }; }; @@ -494,6 +503,37 @@ lt9611_out: endpoint { }; }; +&i2c5 { + clock-frequency = <100000>; + + status = "okay"; + + typec-mux@42 { + compatible = "fcs,fsa4480"; + reg = <0x42>; + + interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>; + + vcc-supply = <&vreg_bob>; + mode-switch; + orientation-switch; + svid = /bits/ 16 <0xff01>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + fsa4480_sbu_mux: endpoint { + remote-endpoint = <&pmic_glink_sbu>; + }; + }; + }; + }; +}; + &mdss { status = "okay"; }; @@ -513,6 +553,21 @@ &mdss_dsi0_phy { status = "okay"; }; +&mdss_dp0 { + status = "okay"; + + ports { + port@1 { + reg = <1>; + + mdss_dp0_out: endpoint { + data-lanes = <0 1>; + remote-endpoint = <&usb_1_qmpphy_dp_in>; + }; + }; + }; +}; + &mdss_mdp { status = "okay"; }; @@ -766,7 +821,7 @@ &usb_1_dwc3_hs { }; &usb_1_dwc3_ss { - remote-endpoint = <&pmic_glink_ss_in>; + remote-endpoint = <&usb_1_qmpphy_usb_ss_in>; }; &usb_1_hsphy { @@ -782,6 +837,20 @@ &usb_1_qmpphy { vdda-phy-supply = <&vreg_l6b_1p2>; vdda-pll-supply = <&vreg_l1b_0p91>; + + orientation-switch; +}; + +&usb_1_qmpphy_dp_in { + remote-endpoint = <&mdss_dp0_out>; +}; + +&usb_1_qmpphy_out { + remote-endpoint = <&pmic_glink_ss_in>; +}; + +&usb_1_qmpphy_usb_ss_in { + remote-endpoint = <&usb_1_dwc3_ss>; }; &vamacro {