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[83.9.31.248]) by smtp.gmail.com with ESMTPSA id y6-20020a2e95c6000000b002a77ab1d73dsm58332ljh.96.2023.05.01.05.57.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 01 May 2023 05:57:18 -0700 (PDT) From: Konrad Dybcio Date: Mon, 01 May 2023 14:57:13 +0200 Subject: [PATCH 3/3] clk: qcom: smd-rpm: Make BI_TCXO_AO critical MIME-Version: 1.0 Message-Id: <20230501-topic-rpmcc_xo_a-v1-3-93f18e47b607@linaro.org> References: <20230501-topic-rpmcc_xo_a-v1-0-93f18e47b607@linaro.org> In-Reply-To: <20230501-topic-rpmcc_xo_a-v1-0-93f18e47b607@linaro.org> To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1682945834; l=1210; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=l8l7+8uAcDF71yxaJqogJmWLjOCgIdZPw3YgQE8kOBk=; b=A0ur+z7Q0fpXelwJBH7Z48fWErgxHPy74GDXgwcZ1IjmPo+Fao6wDfDdxyTt0aiYs8jNGG0gQzEF dR2R0BvDBkQ+uhidoh10ufW1jQPXcK8hqKJBTAsxyhWNMRKlQsUS X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org We should never let go of the active-only XO vote, as otherwise the RPM may decide that there are no online users and it can be shut down, resulting in a total, uncontrolled system collapse. Guarantee this through adding the CLK_IS_CRITICAL flag. Signed-off-by: Konrad Dybcio --- drivers/clk/qcom/clk-smd-rpm.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c index e00889fddc7b..9649f4644d71 100644 --- a/drivers/clk/qcom/clk-smd-rpm.c +++ b/drivers/clk/qcom/clk-smd-rpm.c @@ -439,7 +439,8 @@ static const struct clk_ops clk_smd_rpm_branch_ops = { .recalc_rate = clk_smd_rpm_recalc_rate, }; -DEFINE_CLK_SMD_RPM_BRANCH_A(bi_tcxo, QCOM_SMD_RPM_MISC_CLK, 0, 19200000, 0); +/* Disabling BI_TCXO_AO could gate the root clock source of the entire system. */ +DEFINE_CLK_SMD_RPM_BRANCH_A(bi_tcxo, QCOM_SMD_RPM_MISC_CLK, 0, 19200000, CLK_IS_CRITICAL); DEFINE_CLK_SMD_RPM_BRANCH(qdss, QCOM_SMD_RPM_MISC_CLK, 1, 19200000); DEFINE_CLK_SMD_RPM_QDSS(qdss, QCOM_SMD_RPM_MISC_CLK, 1); DEFINE_CLK_SMD_RPM_BRANCH_A(bimc_freq_log, QCOM_SMD_RPM_MISC_CLK, 4, 1, 0);