From patchwork Fri Apr 21 22:47:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhinav Kumar X-Patchwork-Id: 676178 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BFC95C7618E for ; Fri, 21 Apr 2023 22:47:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232081AbjDUWrp (ORCPT ); Fri, 21 Apr 2023 18:47:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232094AbjDUWro (ORCPT ); Fri, 21 Apr 2023 18:47:44 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BF300F2; Fri, 21 Apr 2023 15:47:38 -0700 (PDT) Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 33LMXdPV013531; Fri, 21 Apr 2023 22:47:32 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=7jtwcQ2eXKaXKxxSOLLQ1U76nRkqnQcOBDX6LutvMJw=; b=TWG0uska9j4xGrq/MCUngN4uluxi+DQZtiBulQYF7MbWxZnqZieVieek6K1yEtuJF2xE i69Ud8OOuoeGurHSbSn0Vqs+DhLwWnIt+j9z6LApZc4I2kDPjIRJXuGomMzexwXMzOoy kLdi6kgCzKzgAZ4VCOrSNMOBTM5ORrCJj3/nww6aqGLr3JRMb4elSQe7vfr4oz3i7EVy 8w/0D9w76gJIVXbbI7FDz6tn1InW9oQP8U898uUdx1Wra9fIFpopjVZGh1sDrimuj81g yrMBPUwNCqiYuqxoW9mK5SyB5EudfgT04wPS3TiY9dGUWz5n85AKCzy1Ep1s5HYzLmIk qQ== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3q3thds8jt-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 21 Apr 2023 22:47:32 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 33LMlVeM021444 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 21 Apr 2023 22:47:31 GMT Received: from abhinavk-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Fri, 21 Apr 2023 15:47:30 -0700 From: Abhinav Kumar To: , Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter CC: , , , , Subject: [PATCH 1/2] drm/msm/dpu: remove DPU_DSPP_GC handling in dspp flush Date: Fri, 21 Apr 2023 15:47:19 -0700 Message-ID: <20230421224721.12738-1-quic_abhinavk@quicinc.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: zYwcGwWxVyblow5OQOQRT_NVx4JjwbyW X-Proofpoint-GUID: zYwcGwWxVyblow5OQOQRT_NVx4JjwbyW X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-21_08,2023-04-21_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 suspectscore=0 clxscore=1015 priorityscore=1501 malwarescore=0 mlxlogscore=853 mlxscore=0 impostorscore=0 spamscore=0 lowpriorityscore=0 bulkscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2304210199 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Gamma correction blocks (GC) are not used today so lets remove the usage of DPU_DSPP_GC in the dspp flush to make it easier to remove GC from the catalog. We can add this back when GC is properly supported in DPU with one of the standard DRM properties. Signed-off-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c index bbdc95ce374a..57adaebab563 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c @@ -336,9 +336,6 @@ static void dpu_hw_ctl_update_pending_flush_dspp_sub_blocks( case DPU_DSPP_PCC: ctx->pending_dspp_flush_mask[dspp - DSPP_0] |= BIT(4); break; - case DPU_DSPP_GC: - ctx->pending_dspp_flush_mask[dspp - DSPP_0] |= BIT(5); - break; default: return; }