From patchwork Thu Apr 6 17:31:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dylan Van Assche X-Patchwork-Id: 671606 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A14D3C77B72 for ; Thu, 6 Apr 2023 17:33:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240088AbjDFRdr (ORCPT ); Thu, 6 Apr 2023 13:33:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51752 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239059AbjDFRdm (ORCPT ); Thu, 6 Apr 2023 13:33:42 -0400 Received: from mout-p-202.mailbox.org (mout-p-202.mailbox.org [80.241.56.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 31A379775; Thu, 6 Apr 2023 10:33:23 -0700 (PDT) Received: from smtp2.mailbox.org (unknown [10.196.197.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-p-202.mailbox.org (Postfix) with ESMTPS id 4PspW36R4Dz9sRs; Thu, 6 Apr 2023 19:33:19 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dylanvanassche.be; s=MBO0001; t=1680802399; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xqA+kJXDocnnJfMI7ArNRBbUlPcBQF5RtKhT0QIIGC4=; b=mIUo+tgupMVuC6rhfyRXB4hCxiMo72jYtSf3U3dH7NVGy/gRr2+Zw7i7mbos+ySUJIjsHC HD4lYOipfVS3FiIWQeM4TapAGeWdjy4Iz6JiohrlR8S7W01nS8RodzfbFGm4jf2EpaEUZc 5K41GHTsL1854fZrtYVGeBe3TkP0AN/EghFrJ5LQ+6ywuCVJQejwOjU7JduO7qTMxeVCxL sA4VYE0hgqqPcJKSavqYbLrnrw1pFnak3OJWOYuvFfMM0yHkpz0I4XOUHyylbQAGOJGZx7 vXEfYWsD4jImS4xE9CSvnooGEytMCR5710UZlAXjY41H+RSBxgML3+fyjHLGaA== From: Dylan Van Assche To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski Cc: Konrad Dybcio , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Dylan Van Assche Subject: [PATCH v5 1/5] arm64: dts: qcom: sdm845: add SLPI remoteproc Date: Thu, 6 Apr 2023 19:31:44 +0200 Message-Id: <20230406173148.28309-2-me@dylanvanassche.be> In-Reply-To: <20230406173148.28309-1-me@dylanvanassche.be> References: <20230406173148.28309-1-me@dylanvanassche.be> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the SLPI remoteproc to the SDM845 Qualcomm SoC which is responsible for exposing the sensors connected to the SoC. The SLPI communicates over GLink edge 'dsps' and is similar to other DSPs e.g. ADSP or CDSP. This patch allows the SLPI to boot and expose itself over QRTR as service 400. Signed-off-by: Dylan Van Assche --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 36 ++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 2f32179c7d1b..338a715d110a 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -3325,6 +3325,42 @@ gpucc: clock-controller@5090000 { "gcc_gpu_gpll0_div_clk_src"; }; + slpi_pas: remoteproc@5c00000 { + compatible = "qcom,sdm845-slpi-pas"; + reg = <0 0x5c00000 0 0x4000>; + + interrupts-extended = <&intc GIC_SPI 494 IRQ_TYPE_EDGE_RISING>, + <&slpi_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, + <&slpi_smp2p_in 1 IRQ_TYPE_EDGE_RISING>, + <&slpi_smp2p_in 2 IRQ_TYPE_EDGE_RISING>, + <&slpi_smp2p_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + qcom,qmp = <&aoss_qmp>; + + power-domains = <&rpmhpd SDM845_CX>, + <&rpmhpd SDM845_MX>; + power-domain-names = "lcx", "lmx"; + + memory-region = <&slpi_mem>; + + qcom,smem-states = <&slpi_smp2p_out 0>; + qcom,smem-state-names = "stop"; + + status = "disabled"; + + glink-edge { + interrupts = ; + label = "dsps"; + qcom,remote-pid = <3>; + mboxes = <&apss_shared 24>; + }; + }; + stm@6002000 { compatible = "arm,coresight-stm", "arm,primecell"; reg = <0 0x06002000 0 0x1000>,