From patchwork Tue May 23 01:08:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jessica Zhang X-Patchwork-Id: 685140 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6565AC77B75 for ; Tue, 23 May 2023 01:09:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233118AbjEWBJm (ORCPT ); Mon, 22 May 2023 21:09:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37960 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231860AbjEWBJj (ORCPT ); Mon, 22 May 2023 21:09:39 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C99419C; Mon, 22 May 2023 18:09:35 -0700 (PDT) Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 34N0sPsW011144; Tue, 23 May 2023 01:09:30 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : date : subject : mime-version : content-type : content-transfer-encoding : message-id : references : in-reply-to : to : cc; s=qcppdkim1; bh=9vBfpXzZLqwFOhu+9A67oENBK77yXGBNcvNDeekEGt0=; b=hD4q3ASSuzvLqXumu7SZGB7Ri8K5rm3lDA8Dud1orq0I2lZQBw9vAsbkGFFC1XIA8cbp oG3p3Zbu4CCLWkVvjcDCTp6CqpVjhymd9tnwob0V4aOb5dqbaCggmG7IOj8oUzs2Pded K4CBaCwzdpPPaTyhZuU+YgAv2sv7rsV1ELNFk3xq31AE5jVIgOfm3tvK1pqR3p5vzmpB nPMGmkp2y0nXFR4PMzbgb7f5qyPKuFT44BliMGNR2vYLs+F8Kttbdqa3elvWpcdrpF1W wuGGLWrjBF3VFCsPX2bjoGk1Rtf2GYzVaDwKo5sMDmaILK5GrCrF0lpE70EdU8SwZzDP cA== Received: from nasanppmta01.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3qrhb0g6dp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 23 May 2023 01:09:30 +0000 Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 34N195wc026232 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 23 May 2023 01:09:05 GMT Received: from jesszhan-linux.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Mon, 22 May 2023 18:09:05 -0700 From: Jessica Zhang Date: Mon, 22 May 2023 18:08:55 -0700 Subject: [PATCH v5 1/5] msm/drm/dsi: Round up DSC hdisplay calculation MIME-Version: 1.0 Message-ID: <20230405-add-dsc-support-v5-1-028c10850491@quicinc.com> References: <20230405-add-dsc-support-v5-0-028c10850491@quicinc.com> In-Reply-To: <20230405-add-dsc-support-v5-0-028c10850491@quicinc.com> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Marijn Suijten CC: Konrad Dybcio , , , , , Jessica Zhang X-Mailer: b4 0.13-dev-bfdf5 X-Developer-Signature: v=1; a=ed25519-sha256; t=1684804144; l=1159; i=quic_jesszhan@quicinc.com; s=20230329; h=from:subject:message-id; bh=Z7rGYxUoEMDO6n2vIOFZD5Q+cCpRrXZUZzZaiIEp3qE=; b=y+AuaiXKaN8NyQ7jl9FnQaO2Hy42FcYknmgDL7oxaUMCOp3v+4Iw9Bl75h4IlBZTwTlaeNBmB haCJ5nLEeI6D94F6VPzq7hgwPhwQQf6l7YKzcoLHngS5fbhw0wzclL6 X-Developer-Key: i=quic_jesszhan@quicinc.com; a=ed25519; pk=gAUCgHZ6wTJOzQa3U0GfeCDH7iZLlqIEPo4rrjfDpWE= X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: WP3S_xoO8DtM3wWN9KA0QCQyE_OzWDaj X-Proofpoint-GUID: WP3S_xoO8DtM3wWN9KA0QCQyE_OzWDaj X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.573,FMLib:17.11.176.26 definitions=2023-05-22_18,2023-05-22_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 phishscore=0 malwarescore=0 spamscore=0 bulkscore=0 suspectscore=0 priorityscore=1501 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2304280000 definitions=main-2305230007 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Currently, when compression is enabled, hdisplay is reduced via integer division. This causes issues for modes where the original hdisplay is not a multiple of 3. To fix this, use DIV_ROUND_UP to divide hdisplay. Suggested-by: Marijn Suijten Fixes: 08802f515c3cf ("drm/msm/dsi: Add support for DSC configuration") Reviewed-by: Marijn Suijten Signed-off-by: Jessica Zhang --- drivers/gpu/drm/msm/dsi/dsi_host.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index 1a99d75025dc..a448931af804 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -949,7 +949,7 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) * pulse width same */ h_total -= hdisplay; - hdisplay = msm_dsc_get_bytes_per_line(msm_host->dsc) / 3; + hdisplay = DIV_ROUND_UP(msm_dsc_get_bytes_per_line(msm_host->dsc), 3); h_total += hdisplay; ha_end = ha_start + hdisplay; }