From patchwork Thu Mar 16 16:16:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 664060 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 75B5EC7618E for ; Thu, 16 Mar 2023 16:17:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229691AbjCPQR6 (ORCPT ); Thu, 16 Mar 2023 12:17:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37338 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230250AbjCPQRs (ORCPT ); Thu, 16 Mar 2023 12:17:48 -0400 Received: from mail-lj1-x236.google.com (mail-lj1-x236.google.com [IPv6:2a00:1450:4864:20::236]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EB538E20F8 for ; Thu, 16 Mar 2023 09:17:20 -0700 (PDT) Received: by mail-lj1-x236.google.com with SMTP id g18so2270658ljl.3 for ; Thu, 16 Mar 2023 09:17:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678983432; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mUEdczsu9UCaSirb+O+JZVPTTSp/6xD+VARcrsNJzNo=; b=AQsO66kEL3TyVL2yqRZUontGCQDRGNVi9ISFj9GXe3WEomeN1C74jiM2F7Cyti1FaS liVsEprg1WL+9YZ5Nr94g5yMzRTRxMlFsRRuvE0/8px/HalCbl68lWlR5DGdWDtOTgtN owMopCtspXCluJzpidsvJdglPV+s4t6CPwT8osGyruW4aPq82B9peV4JGOypBx+E+gat HQdkg6x3+dFnLxbHAea+Q266dbu3ckytKMkk9mDFpaVMd2OjmVKlsc9HRn5KV3iytBAT hyWM7W/c11rb9VWxhXH49fnxO35/8uxsxanHC1P1SAijF1jv48iIIThDlWr1whfb9HBH oong== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678983432; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mUEdczsu9UCaSirb+O+JZVPTTSp/6xD+VARcrsNJzNo=; b=te2YOw5BzWqAfeI2vqpFzIFCMo00Gr3kgq8h+8XJvsE4WT2jIEBgvrRT0svcn4CR92 4I+S0/PR2di6hzFRiONg55wKO6xC77mj32qXcNTnznzNnfuZcOuLLpTaF+jxIYBdu7Yx EWCrEKxTY4iSBVxiWITEOb5CCI39ARd6XHrS8/x1QYnhmZz3mCHBM8DyjHlVlo/F48Yu yCggmcVXkoMfJlqs03xXyQTcahY22LCOLBzgpE9zV7GqC1xxQIH7u4mK5+/Trs6TUa3Y AH320miIB048OabxC4jyRqqwQbGudV3Wc4EYIiuA0azOxbc8fm3MyCbyv9tRPXaPIMCu x+Tw== X-Gm-Message-State: AO0yUKXO2RJvflrVVfr2e07EzeEvMZ6xpPaWZTKlh/dQXE6vLf7rYAeb 9bLRAtpBtJTmArek2yOM4/ZMdQ== X-Google-Smtp-Source: AK7set+s4NP4peSDG/yH5/T33TWILNNjxuNchG7CUatZhyCvV1//6HIA8V+kHw0Qw0ElYJxypOy/nw== X-Received: by 2002:a2e:9587:0:b0:299:2cae:6c4f with SMTP id w7-20020a2e9587000000b002992cae6c4fmr1264818ljh.28.1678983432326; Thu, 16 Mar 2023 09:17:12 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id l2-20020a2e8342000000b00298b33afe1csm549152ljh.87.2023.03.16.09.17.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 09:17:11 -0700 (PDT) From: Dmitry Baryshkov To: Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , Bjorn Andersson , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v7 19/32] drm/msm/dpu: make _dpu_plane_calc_clk accept mode directly Date: Thu, 16 Mar 2023 19:16:40 +0300 Message-Id: <20230316161653.4106395-20-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230316161653.4106395-1-dmitry.baryshkov@linaro.org> References: <20230316161653.4106395-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Rework bandwidth/clock calculation functions to use mode directly rather than fetching it through the plane data. Reviewed-by: Abhinav Kumar Tested-by: Abhinav Kumar # sc7280 Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 39 ++++++++++------------- 1 file changed, 17 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index aaea7c63d944..6cd787e85be8 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -127,20 +127,19 @@ static struct dpu_kms *_dpu_plane_get_kms(struct drm_plane *plane) /** * _dpu_plane_calc_bw - calculate bandwidth required for a plane - * @plane: Pointer to drm plane. + * @catalog: Points to dpu catalog structure * @fmt: Pointer to source buffer format + * @mode: Pointer to drm display mode * @pipe_cfg: Pointer to pipe configuration * Result: Updates calculated bandwidth in the plane state. * BW Equation: src_w * src_h * bpp * fps * (v_total / v_dest) * Prefill BW Equation: line src bytes * line_time */ -static void _dpu_plane_calc_bw(struct drm_plane *plane, +static u64 _dpu_plane_calc_bw(const struct dpu_mdss_cfg *catalog, const struct dpu_format *fmt, + const struct drm_display_mode *mode, struct dpu_sw_pipe_cfg *pipe_cfg) { - struct dpu_plane_state *pstate; - struct drm_display_mode *mode; - struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane); int src_width, src_height, dst_height, fps; u64 plane_prefill_bw; u64 plane_bw; @@ -148,9 +147,6 @@ static void _dpu_plane_calc_bw(struct drm_plane *plane, u64 scale_factor; int vbp, vpw, vfp; - pstate = to_dpu_plane_state(plane->state); - mode = &plane->state->crtc->mode; - src_width = drm_rect_width(&pipe_cfg->src_rect); src_height = drm_rect_height(&pipe_cfg->src_rect); dst_height = drm_rect_height(&pipe_cfg->dst_rect); @@ -158,7 +154,7 @@ static void _dpu_plane_calc_bw(struct drm_plane *plane, vbp = mode->vtotal - mode->vsync_end; vpw = mode->vsync_end - mode->vsync_start; vfp = mode->vsync_start - mode->vdisplay; - hw_latency_lines = dpu_kms->catalog->perf->min_prefill_lines; + hw_latency_lines = catalog->perf->min_prefill_lines; scale_factor = src_height > dst_height ? mult_frac(src_height, 1, dst_height) : 1; @@ -178,37 +174,36 @@ static void _dpu_plane_calc_bw(struct drm_plane *plane, do_div(plane_prefill_bw, hw_latency_lines); - pstate->plane_fetch_bw = max(plane_bw, plane_prefill_bw); + return max(plane_bw, plane_prefill_bw); } /** * _dpu_plane_calc_clk - calculate clock required for a plane - * @plane: Pointer to drm plane. + * @mode: Pointer to drm display mode * @pipe_cfg: Pointer to pipe configuration * Result: Updates calculated clock in the plane state. * Clock equation: dst_w * v_total * fps * (src_h / dst_h) */ -static void _dpu_plane_calc_clk(struct drm_plane *plane, struct dpu_sw_pipe_cfg *pipe_cfg) +static u64 _dpu_plane_calc_clk(const struct drm_display_mode *mode, + struct dpu_sw_pipe_cfg *pipe_cfg) { - struct dpu_plane_state *pstate; - struct drm_display_mode *mode; int dst_width, src_height, dst_height, fps; - - pstate = to_dpu_plane_state(plane->state); - mode = &plane->state->crtc->mode; + u64 plane_clk; src_height = drm_rect_height(&pipe_cfg->src_rect); dst_width = drm_rect_width(&pipe_cfg->dst_rect); dst_height = drm_rect_height(&pipe_cfg->dst_rect); fps = drm_mode_vrefresh(mode); - pstate->plane_clk = + plane_clk = dst_width * mode->vtotal * fps; if (src_height > dst_height) { - pstate->plane_clk *= src_height; - do_div(pstate->plane_clk, dst_height); + plane_clk *= src_height; + do_div(plane_clk, dst_height); } + + return plane_clk; } /** @@ -1219,9 +1214,9 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane) _dpu_plane_set_qos_remap(plane, pipe); } - _dpu_plane_calc_bw(plane, fmt, &pipe_cfg); + pstate->plane_fetch_bw = _dpu_plane_calc_bw(pdpu->catalog, fmt, &crtc->mode, &pipe_cfg); - _dpu_plane_calc_clk(plane, &pipe_cfg); + pstate->plane_clk = _dpu_plane_calc_clk(&crtc->mode, &pipe_cfg); } static void _dpu_plane_atomic_disable(struct drm_plane *plane)