From patchwork Thu Mar 16 16:16:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 664065 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BA10FC76196 for ; Thu, 16 Mar 2023 16:17:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229758AbjCPQRt (ORCPT ); Thu, 16 Mar 2023 12:17:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37832 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230100AbjCPQRn (ORCPT ); Thu, 16 Mar 2023 12:17:43 -0400 Received: from mail-lj1-x22a.google.com (mail-lj1-x22a.google.com [IPv6:2a00:1450:4864:20::22a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D9D3DDCA59 for ; Thu, 16 Mar 2023 09:17:18 -0700 (PDT) Received: by mail-lj1-x22a.google.com with SMTP id z42so2236051ljq.13 for ; Thu, 16 Mar 2023 09:17:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678983425; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1nSmyfSHo7EBUHuuEhKgpihhBPnp/4UutQgvjZNsSEg=; b=u2xNUiJkQM9B0eiqb221sVFMvScOKzo9sIxm/zuP3J0dvv4lysT0XsUMBVFeHA2By+ mylU9P7/ivUpOLpcC+PKN7K25uRe3JjO6IYJapUkz/YsDmtoxaa9hawBtBCliyrh2eRx YiR4diYuYWaPncvEtT+L9d64zYNcHQ1b3UgKsxhiCS6dsnPQUlryEMtEioyq/ImJPwOl qKJhMLD7+Y0URaG3o7z2YVBOntj4cG7Ve5E1W86r03RzP+lRyAhjpRQZaKeiV7CkzvwO R+CXtl11x1JzM2osWmHz8VKEiLozp4jhmpItJ+KtlHIJo2oMTul5CpcVt/S1xv1sibwp hOQQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678983425; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1nSmyfSHo7EBUHuuEhKgpihhBPnp/4UutQgvjZNsSEg=; b=X0B3XtL4hUv/qs+ZvYV1WA9eNxWnUzO79rjE0kZldlaKZ2Oei4D7/FLFTwhHQ63tmm Q00dm5UmSoqXV5UqKC6NFIo26fZqCOnrknZpO3Hp87C9eeykQIs0g6vFh48RGDur0F13 7nCojXuJJAz5Xyj0iNaBE8W7WwVnhN3tY7bZJuz9Cta7ociQdmwuonoX4pxVmlIMnfv2 yesI/JyG1CuSn81soOXFnTa1l7XMEbPsjS8h9i/VYOsb4eECij80TPxnH5lZ+/yfo7sV mJ67lmWtG734gWrAZTP5psXPimG+orewNYq82x/aMkxRPUGYGJ+aeW2Tkp8RX4ZY7ItE 8fng== X-Gm-Message-State: AO0yUKWBFGU/Ieqlm5GAKN1Czn65NieNtOIaEoE/lEXSSQugfz60Rbq6 5oo/dc5d5fUDXobGRGFRAqps9w== X-Google-Smtp-Source: AK7set/zAo1Z9sj8A61aT7OPf9221QTcwmReFBcZfPS2dPSgVQaVydrjfqBdcrKtLCVyV42gkKaQSw== X-Received: by 2002:a2e:b8cd:0:b0:298:9c76:ae3f with SMTP id s13-20020a2eb8cd000000b002989c76ae3fmr3192465ljp.40.1678983425242; Thu, 16 Mar 2023 09:17:05 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id l2-20020a2e8342000000b00298b33afe1csm549152ljh.87.2023.03.16.09.17.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Mar 2023 09:17:04 -0700 (PDT) From: Dmitry Baryshkov To: Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , Bjorn Andersson , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v7 11/32] drm/msm/dpu: move stride programming to dpu_hw_sspp_setup_sourceaddress Date: Thu, 16 Mar 2023 19:16:32 +0300 Message-Id: <20230316161653.4106395-12-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230316161653.4106395-1-dmitry.baryshkov@linaro.org> References: <20230316161653.4106395-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Move stride programming to dpu_hw_sspp_setup_sourceaddress(), so that dpu_hw_sspp_setup_rects() programs only source and destination rectangles. Reviewed-by: Abhinav Kumar Tested-by: Abhinav Kumar # sc7280 Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 57 +++++++++++---------- 1 file changed, 29 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c index 0a43c5682b2b..ab95f2817378 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c @@ -451,7 +451,7 @@ static void dpu_hw_sspp_setup_rects(struct dpu_sw_pipe *pipe, { struct dpu_hw_sspp *ctx = pipe->sspp; struct dpu_hw_blk_reg_map *c; - u32 src_size, src_xy, dst_size, dst_xy, ystride0, ystride1; + u32 src_size, src_xy, dst_size, dst_xy; u32 src_size_off, src_xy_off, out_size_off, out_xy_off; u32 idx; @@ -482,44 +482,18 @@ static void dpu_hw_sspp_setup_rects(struct dpu_sw_pipe *pipe, dst_size = (drm_rect_height(&cfg->dst_rect) << 16) | drm_rect_width(&cfg->dst_rect); - if (pipe->multirect_index == DPU_SSPP_RECT_SOLO) { - ystride0 = (cfg->layout.plane_pitch[0]) | - (cfg->layout.plane_pitch[1] << 16); - ystride1 = (cfg->layout.plane_pitch[2]) | - (cfg->layout.plane_pitch[3] << 16); - } else { - ystride0 = DPU_REG_READ(c, SSPP_SRC_YSTRIDE0 + idx); - ystride1 = DPU_REG_READ(c, SSPP_SRC_YSTRIDE1 + idx); - - if (pipe->multirect_index == DPU_SSPP_RECT_0) { - ystride0 = (ystride0 & 0xFFFF0000) | - (cfg->layout.plane_pitch[0] & 0x0000FFFF); - ystride1 = (ystride1 & 0xFFFF0000)| - (cfg->layout.plane_pitch[2] & 0x0000FFFF); - } else { - ystride0 = (ystride0 & 0x0000FFFF) | - ((cfg->layout.plane_pitch[0] << 16) & - 0xFFFF0000); - ystride1 = (ystride1 & 0x0000FFFF) | - ((cfg->layout.plane_pitch[2] << 16) & - 0xFFFF0000); - } - } - /* rectangle register programming */ DPU_REG_WRITE(c, src_size_off + idx, src_size); DPU_REG_WRITE(c, src_xy_off + idx, src_xy); DPU_REG_WRITE(c, out_size_off + idx, dst_size); DPU_REG_WRITE(c, out_xy_off + idx, dst_xy); - - DPU_REG_WRITE(c, SSPP_SRC_YSTRIDE0 + idx, ystride0); - DPU_REG_WRITE(c, SSPP_SRC_YSTRIDE1 + idx, ystride1); } static void dpu_hw_sspp_setup_sourceaddress(struct dpu_sw_pipe *pipe, struct dpu_hw_sspp_cfg *cfg) { struct dpu_hw_sspp *ctx = pipe->sspp; + u32 ystride0, ystride1; int i; u32 idx; @@ -541,6 +515,33 @@ static void dpu_hw_sspp_setup_sourceaddress(struct dpu_sw_pipe *pipe, DPU_REG_WRITE(&ctx->hw, SSPP_SRC3_ADDR + idx, cfg->layout.plane_addr[2]); } + + if (pipe->multirect_index == DPU_SSPP_RECT_SOLO) { + ystride0 = (cfg->layout.plane_pitch[0]) | + (cfg->layout.plane_pitch[1] << 16); + ystride1 = (cfg->layout.plane_pitch[2]) | + (cfg->layout.plane_pitch[3] << 16); + } else { + ystride0 = DPU_REG_READ(&ctx->hw, SSPP_SRC_YSTRIDE0 + idx); + ystride1 = DPU_REG_READ(&ctx->hw, SSPP_SRC_YSTRIDE1 + idx); + + if (pipe->multirect_index == DPU_SSPP_RECT_0) { + ystride0 = (ystride0 & 0xFFFF0000) | + (cfg->layout.plane_pitch[0] & 0x0000FFFF); + ystride1 = (ystride1 & 0xFFFF0000)| + (cfg->layout.plane_pitch[2] & 0x0000FFFF); + } else { + ystride0 = (ystride0 & 0x0000FFFF) | + ((cfg->layout.plane_pitch[0] << 16) & + 0xFFFF0000); + ystride1 = (ystride1 & 0x0000FFFF) | + ((cfg->layout.plane_pitch[2] << 16) & + 0xFFFF0000); + } + } + + DPU_REG_WRITE(&ctx->hw, SSPP_SRC_YSTRIDE0 + idx, ystride0); + DPU_REG_WRITE(&ctx->hw, SSPP_SRC_YSTRIDE1 + idx, ystride1); } static void dpu_hw_sspp_setup_csc(struct dpu_hw_sspp *ctx,