From patchwork Tue Mar 14 15:35:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 663031 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 98CB0C6FD1C for ; Tue, 14 Mar 2023 15:38:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230123AbjCNPiH (ORCPT ); Tue, 14 Mar 2023 11:38:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44434 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230396AbjCNPhn (ORCPT ); Tue, 14 Mar 2023 11:37:43 -0400 Received: from mail-lj1-x22d.google.com (mail-lj1-x22d.google.com [IPv6:2a00:1450:4864:20::22d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2CD6530DF for ; Tue, 14 Mar 2023 08:36:46 -0700 (PDT) Received: by mail-lj1-x22d.google.com with SMTP id by8so16436035ljb.7 for ; Tue, 14 Mar 2023 08:36:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678808165; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HasERhvqMHIxKihMAH1T2YH/E5fqGxHKVXpkZjLBT7k=; b=eFTP3E94vr0kQv2yyidcwEy0IUXtlQdVXH/b7Yl3qVSJQkLxQrz/lmTCwZdtg3QH1W yd60w8GPuTlzYj4aAZhwyjFTVmG5WyrG2+3EScFqnEXM2mqmLrj9sHNSmHoFLCh8LPQQ jA747zCtEa1gPooWTtNaZt9YEq6qMkXP0bOcYW1m/VOcJfV9CLTKcU3XjEqDTbemQulW LHgxDD9hvsACn4Cvslv1JqeLGvX6nr7cYH24NWjBnIKLMCT0ILnR4RHHz4gqFt7WL99p veAWR0EqUVtPJ7TpBCtmYK/otgVNt3h02V7hY6j4eCUMCRL3CJHRbqF+WIdENAdA4Ur7 T+TA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678808165; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HasERhvqMHIxKihMAH1T2YH/E5fqGxHKVXpkZjLBT7k=; b=y69JchpvmnvIkg5L2lvIDVykk0Dn2A11tmVIAmoEbs8+HTzKJA0U/ey4K178VLkvlX 4VHZAv1Gmr8gM0TrAUYgiTY+CgpIXNshHFmr2ng11iwof167dXRzvW8WfJbwKk++0T1c ISaf17dEWk3U5bTAHXOhoBIXK9y5Ocq66RtNX6pgOvFTweeRSpNr3naqt5b8fTKx+ZP/ SvO37LgqXoYstSR3M3u4qh+l3eVXTJqpr1N4bEEIVbgB6qYIZjUklmdjlZbIGFgjHjxf 8BDjWJ8E5nGN76wtvAL8C/fHB8J/IBc/Vr8jVpTb+4AAWpybn1IbJERHP2JzatSwIohW ncjg== X-Gm-Message-State: AO0yUKWLowrtFJpq6MHPvwzCk59FCfO0oOupwhTj/29jinxQcu/Qx5Zd rg3C5YNfFqPTgB3wlqPPw2rysA== X-Google-Smtp-Source: AK7set/vcwEWok3eEY/XO4SA//53HVztKnixbq6Lo/CF3kGBHC6+15RyByN2+yx4Lbw0C0YMXYtL6g== X-Received: by 2002:a2e:a98c:0:b0:298:39e6:cc1a with SMTP id x12-20020a2ea98c000000b0029839e6cc1amr14326582ljq.9.1678808164893; Tue, 14 Mar 2023 08:36:04 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id z8-20020a2eb528000000b0029573844d03sm470854ljm.109.2023.03.14.08.36.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Mar 2023 08:36:04 -0700 (PDT) From: Dmitry Baryshkov To: Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , Bjorn Andersson , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v6 26/32] drm/msm/dpu: split pipe handling from _dpu_crtc_blend_setup_mixer Date: Tue, 14 Mar 2023 18:35:39 +0300 Message-Id: <20230314153545.3442879-27-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20230314153545.3442879-1-dmitry.baryshkov@linaro.org> References: <20230314153545.3442879-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Rework _dpu_crtc_blend_setup_mixer() to split away pipe handling to a separate functon. This is a preparation for the r_pipe support. Reviewed-by: Abhinav Kumar Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 79 +++++++++++++++--------- 1 file changed, 50 insertions(+), 29 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 89d2c4735001..217a8112f1a2 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -401,6 +401,46 @@ static void _dpu_crtc_program_lm_output_roi(struct drm_crtc *crtc) } } +static void _dpu_crtc_blend_setup_pipe(struct drm_crtc *crtc, + struct drm_plane *plane, + struct dpu_crtc_mixer *mixer, + u32 num_mixers, + enum dpu_stage stage, + struct dpu_format *format, + uint64_t modifier, + struct dpu_sw_pipe *pipe, + unsigned int stage_idx, + struct dpu_hw_stage_cfg *stage_cfg + ) +{ + uint32_t lm_idx; + enum dpu_sspp sspp_idx; + struct drm_plane_state *state; + + sspp_idx = pipe->sspp->idx; + + state = plane->state; + + trace_dpu_crtc_setup_mixer(DRMID(crtc), DRMID(plane), + state, to_dpu_plane_state(state), stage_idx, + format->base.pixel_format, + modifier); + + DRM_DEBUG_ATOMIC("crtc %d stage:%d - plane %d sspp %d fb %d\n", + crtc->base.id, + stage, + plane->base.id, + sspp_idx - SSPP_NONE, + state->fb ? state->fb->base.id : -1); + + stage_cfg->stage[stage][stage_idx] = sspp_idx; + stage_cfg->multirect_index[stage][stage_idx] = pipe->multirect_index; + + /* blend config update */ + for (lm_idx = 0; lm_idx < num_mixers; lm_idx++) + mixer[lm_idx].lm_ctl->ops.update_pending_flush_sspp(mixer[lm_idx].lm_ctl, sspp_idx); +} + static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc, struct dpu_crtc *dpu_crtc, struct dpu_crtc_mixer *mixer, struct dpu_hw_stage_cfg *stage_cfg) @@ -413,15 +453,12 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc, struct dpu_format *format; struct dpu_hw_ctl *ctl = mixer->lm_ctl; - uint32_t stage_idx, lm_idx; - int zpos_cnt[DPU_STAGE_MAX + 1] = { 0 }; + uint32_t lm_idx; bool bg_alpha_enable = false; DECLARE_BITMAP(fetch_active, SSPP_MAX); memset(fetch_active, 0, sizeof(fetch_active)); drm_atomic_crtc_for_each_plane(plane, crtc) { - enum dpu_sspp sspp_idx; - state = plane->state; if (!state) continue; @@ -432,39 +469,21 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc *crtc, pstate = to_dpu_plane_state(state); fb = state->fb; - sspp_idx = pstate->pipe.sspp->idx; - set_bit(sspp_idx, fetch_active); - - DRM_DEBUG_ATOMIC("crtc %d stage:%d - plane %d sspp %d fb %d\n", - crtc->base.id, - pstate->stage, - plane->base.id, - sspp_idx - SSPP_VIG0, - state->fb ? state->fb->base.id : -1); - format = to_dpu_format(msm_framebuffer_format(pstate->base.fb)); if (pstate->stage == DPU_STAGE_BASE && format->alpha_enable) bg_alpha_enable = true; - stage_idx = zpos_cnt[pstate->stage]++; - stage_cfg->stage[pstate->stage][stage_idx] = - sspp_idx; - stage_cfg->multirect_index[pstate->stage][stage_idx] = - pstate->pipe.multirect_index; - - trace_dpu_crtc_setup_mixer(DRMID(crtc), DRMID(plane), - state, pstate, stage_idx, - format->base.pixel_format, - fb ? fb->modifier : 0); + set_bit(pstate->pipe.sspp->idx, fetch_active); + _dpu_crtc_blend_setup_pipe(crtc, plane, + mixer, cstate->num_mixers, + pstate->stage, + format, fb ? fb->modifier : 0, + &pstate->pipe, 0, stage_cfg); /* blend config update */ for (lm_idx = 0; lm_idx < cstate->num_mixers; lm_idx++) { - _dpu_crtc_setup_blend_cfg(mixer + lm_idx, - pstate, format); - - mixer[lm_idx].lm_ctl->ops.update_pending_flush_sspp(mixer[lm_idx].lm_ctl, - sspp_idx); + _dpu_crtc_setup_blend_cfg(mixer + lm_idx, pstate, format); if (bg_alpha_enable && !format->alpha_enable) mixer[lm_idx].mixer_op_mode = 0; @@ -1322,6 +1341,8 @@ static int _dpu_debugfs_status_show(struct seq_file *s, void *data) seq_printf(s, "\tdst x:%4d dst_y:%4d dst_w:%4d dst_h:%4d\n", state->crtc_x, state->crtc_y, state->crtc_w, state->crtc_h); + seq_printf(s, "\tsspp:%s\n", + pstate->pipe.sspp->cap->name); seq_printf(s, "\tmultirect: mode: %d index: %d\n", pstate->pipe.multirect_mode, pstate->pipe.multirect_index);