From patchwork Fri Mar 10 00:56:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 662492 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1233C61DA4 for ; Fri, 10 Mar 2023 00:57:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229874AbjCJA5a (ORCPT ); Thu, 9 Mar 2023 19:57:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58080 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229639AbjCJA51 (ORCPT ); Thu, 9 Mar 2023 19:57:27 -0500 Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E5866FA0A8 for ; Thu, 9 Mar 2023 16:57:16 -0800 (PST) Received: by mail-lf1-x135.google.com with SMTP id m6so4620044lfq.5 for ; Thu, 09 Mar 2023 16:57:16 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678409835; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yE54hJ+/zsvYC9omTgOIlbE6Y7+e3/amY9hYQUn7qAQ=; b=tGFY/tNp09DtrTUKIgc3IjLOJLdHAd3nbSe2XtGq244bM/bwdH/Y28IlLm/6251+X/ yGWF3leXU34qZ6plebTQWKxuJmi5fsR2WyEX3oPUdL4HWxQU5UBg4KTOCDuavj3KwrFy JbL3cBeamu469BPomBCF5blDKrBCwZnj/J7Lud6byhyI3khzPSozxthwWU6lht/vrU0t g3L9KLS9qbG0vdP/l+teryukNcw3D9+nXIoo381bXxrmmTucA+s+fMi77kEsil3uHDJX zqNOSOWLcnjTlnF/vDILhuLBkSvYKRJO1Y91iWkKQMnvO247fCdys/4REwVcYoRdarpt YXwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678409835; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yE54hJ+/zsvYC9omTgOIlbE6Y7+e3/amY9hYQUn7qAQ=; b=D4KrWkQbZ9JKevM0avwlSkL9GSNOR1ir6O2TCJ2TwsN1xd0DBNPJIcQiB3bUEb3dtc ZPr3Ig+LKDctGoluZUPjErMKpTvjQMPbBdvfUbfp+LVDFxJVlebmG18aPbZU+WNHC1J+ VOtugHKdFmp0AIl8LxIG0Vn4D4votLJ6luh5kVUN7cQ59tzkt5j5SqTgXdg8LC8fZQIL ooe9K5BpA4LMOk1Rj5myHT9Sw12CsGOSf74IayNGeBEYQIuMkdAjU7IaO71cjDU6MqPc CiAC6pynN9JPBH5X1+w9K6ivt9C89SGEHOzgQvxQ34JtpCyw8wOVuoBPLd7HXBC6sNb9 GoGg== X-Gm-Message-State: AO0yUKXkE5eMixaiFzrcrC6h02EuBhufga0985CQy40BzGOG8gi5HUeM GG/wRPsdjxncGS1cQYXo+YfqFr+qNTtcUsd1I0I= X-Google-Smtp-Source: AK7set+EaMa1HRzZimXU3xGz+i/WrzGBStYMlhAK7fdFODWfufOEzuGv0Q2rD4SgKCUJ9OKNe/6i1A== X-Received: by 2002:ac2:551a:0:b0:4dc:84b3:bc5f with SMTP id j26-20020ac2551a000000b004dc84b3bc5fmr6168997lfk.30.1678409835232; Thu, 09 Mar 2023 16:57:15 -0800 (PST) Received: from eriador.lan (dzccz6yyyyyyyyyyybcwt-3.rev.dnainternet.fi. [2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id m13-20020ac2428d000000b004d8540b947asm75280lfh.56.2023.03.09.16.57.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Mar 2023 16:57:14 -0800 (PST) From: Dmitry Baryshkov To: Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , Bjorn Andersson , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v5 11/32] drm/msm/dpu: move stride programming to dpu_hw_sspp_setup_sourceaddress Date: Fri, 10 Mar 2023 02:56:43 +0200 Message-Id: <20230310005704.1332368-12-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230310005704.1332368-1-dmitry.baryshkov@linaro.org> References: <20230310005704.1332368-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Move stride programming to dpu_hw_sspp_setup_sourceaddress(), so that dpu_hw_sspp_setup_rects() programs only source and destination rectangles. Reviewed-by: Abhinav Kumar Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 57 +++++++++++---------- 1 file changed, 29 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c index 0a43c5682b2b..ab95f2817378 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c @@ -451,7 +451,7 @@ static void dpu_hw_sspp_setup_rects(struct dpu_sw_pipe *pipe, { struct dpu_hw_sspp *ctx = pipe->sspp; struct dpu_hw_blk_reg_map *c; - u32 src_size, src_xy, dst_size, dst_xy, ystride0, ystride1; + u32 src_size, src_xy, dst_size, dst_xy; u32 src_size_off, src_xy_off, out_size_off, out_xy_off; u32 idx; @@ -482,44 +482,18 @@ static void dpu_hw_sspp_setup_rects(struct dpu_sw_pipe *pipe, dst_size = (drm_rect_height(&cfg->dst_rect) << 16) | drm_rect_width(&cfg->dst_rect); - if (pipe->multirect_index == DPU_SSPP_RECT_SOLO) { - ystride0 = (cfg->layout.plane_pitch[0]) | - (cfg->layout.plane_pitch[1] << 16); - ystride1 = (cfg->layout.plane_pitch[2]) | - (cfg->layout.plane_pitch[3] << 16); - } else { - ystride0 = DPU_REG_READ(c, SSPP_SRC_YSTRIDE0 + idx); - ystride1 = DPU_REG_READ(c, SSPP_SRC_YSTRIDE1 + idx); - - if (pipe->multirect_index == DPU_SSPP_RECT_0) { - ystride0 = (ystride0 & 0xFFFF0000) | - (cfg->layout.plane_pitch[0] & 0x0000FFFF); - ystride1 = (ystride1 & 0xFFFF0000)| - (cfg->layout.plane_pitch[2] & 0x0000FFFF); - } else { - ystride0 = (ystride0 & 0x0000FFFF) | - ((cfg->layout.plane_pitch[0] << 16) & - 0xFFFF0000); - ystride1 = (ystride1 & 0x0000FFFF) | - ((cfg->layout.plane_pitch[2] << 16) & - 0xFFFF0000); - } - } - /* rectangle register programming */ DPU_REG_WRITE(c, src_size_off + idx, src_size); DPU_REG_WRITE(c, src_xy_off + idx, src_xy); DPU_REG_WRITE(c, out_size_off + idx, dst_size); DPU_REG_WRITE(c, out_xy_off + idx, dst_xy); - - DPU_REG_WRITE(c, SSPP_SRC_YSTRIDE0 + idx, ystride0); - DPU_REG_WRITE(c, SSPP_SRC_YSTRIDE1 + idx, ystride1); } static void dpu_hw_sspp_setup_sourceaddress(struct dpu_sw_pipe *pipe, struct dpu_hw_sspp_cfg *cfg) { struct dpu_hw_sspp *ctx = pipe->sspp; + u32 ystride0, ystride1; int i; u32 idx; @@ -541,6 +515,33 @@ static void dpu_hw_sspp_setup_sourceaddress(struct dpu_sw_pipe *pipe, DPU_REG_WRITE(&ctx->hw, SSPP_SRC3_ADDR + idx, cfg->layout.plane_addr[2]); } + + if (pipe->multirect_index == DPU_SSPP_RECT_SOLO) { + ystride0 = (cfg->layout.plane_pitch[0]) | + (cfg->layout.plane_pitch[1] << 16); + ystride1 = (cfg->layout.plane_pitch[2]) | + (cfg->layout.plane_pitch[3] << 16); + } else { + ystride0 = DPU_REG_READ(&ctx->hw, SSPP_SRC_YSTRIDE0 + idx); + ystride1 = DPU_REG_READ(&ctx->hw, SSPP_SRC_YSTRIDE1 + idx); + + if (pipe->multirect_index == DPU_SSPP_RECT_0) { + ystride0 = (ystride0 & 0xFFFF0000) | + (cfg->layout.plane_pitch[0] & 0x0000FFFF); + ystride1 = (ystride1 & 0xFFFF0000)| + (cfg->layout.plane_pitch[2] & 0x0000FFFF); + } else { + ystride0 = (ystride0 & 0x0000FFFF) | + ((cfg->layout.plane_pitch[0] << 16) & + 0xFFFF0000); + ystride1 = (ystride1 & 0x0000FFFF) | + ((cfg->layout.plane_pitch[2] << 16) & + 0xFFFF0000); + } + } + + DPU_REG_WRITE(&ctx->hw, SSPP_SRC_YSTRIDE0 + idx, ystride0); + DPU_REG_WRITE(&ctx->hw, SSPP_SRC_YSTRIDE1 + idx, ystride1); } static void dpu_hw_sspp_setup_csc(struct dpu_hw_sspp *ctx,