From patchwork Thu Mar 9 08:50:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 661810 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29584C61DA4 for ; Thu, 9 Mar 2023 08:52:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230496AbjCIIwj (ORCPT ); Thu, 9 Mar 2023 03:52:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52738 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230458AbjCIIwe (ORCPT ); Thu, 9 Mar 2023 03:52:34 -0500 Received: from mail-pf1-x42a.google.com (mail-pf1-x42a.google.com [IPv6:2607:f8b0:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6FBA0D7C1C for ; Thu, 9 Mar 2023 00:52:05 -0800 (PST) Received: by mail-pf1-x42a.google.com with SMTP id b20so1010363pfo.6 for ; Thu, 09 Mar 2023 00:52:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678351915; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=KBoZXs7oWaG22XZASLiUsiWHjHyRIoI/eDEhjgIXc7Q=; b=pFC+61FTddDGow/cxO8MI1nHlhhsL8Q+90F6fRoDlt9EmQ4QOl+yY35NVQQRugR98a NSPOk9lIbluoHxOAAOAhMZBhHb4Ilib45Bm871g61m/ArD3zd6OUggSDm9gZJ5oWiIfh j3nGsSlZ6yotv6eBa0qMvZ0XbLtSaOC4mro+GaoQcjNqCQ3hR9J14U0JX8Q+zw+AADyo Rm/sJ/VxYaQWrlgknIOlPB1Pm/+WFYk7yC4F+nh044LcwOrOFra56U9gjZkakm6e7S+2 1FfxGPvYWhQeL1uw9lTz6Uosouw9tW0ltYDpQ0KTUbC8Zf5Lw8xHcK6yw2LybfJ7UC4j KfHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678351915; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KBoZXs7oWaG22XZASLiUsiWHjHyRIoI/eDEhjgIXc7Q=; b=MqD9gI8Y00Aytaw1KuiQhcm9nBdpKl2c77flEPrNkXRittAyiM+Wi44c/t7VxGEyNR Il6GmYvxgVPVLxTgP8OLkPYMhtgDbBO5pj8tXN+UTaPPa7e3TTgOhnQc6bbehi4IjRzX YpoJvCgMPH/yvVHuP1ESkgb+yBczQC9tx7mOACKyZtGmk0GKfW7d6PlEvfCj6J7nbHbl I0wxe4cRvxBen0Qr3n8txbYzOXBgRYmtHoVTETCe8KH2zPpIuxzUCsQBTAK5Naa6bxcu r8T+01CRGxwawqZ1r+VMZ3u4hpmgBzKmN23+JPi06EqvFiaoun+St0ZoEnv1NUnJR6T2 jMHw== X-Gm-Message-State: AO0yUKX/X3ZMgMhN6lU1eUsixBFVL22R6MG2cduSwfYkMJ7t27QHGT8+ aHfo4JHUWBylPsG8wUiYcb7LUIcHxC+5qldaLg== X-Google-Smtp-Source: AK7set9pPrdbE5uSublA4yMinJI/N0e4h8XtUst8EotNG+2/tTf9i6rDRd/IMClGjzU6QICue2ENNA== X-Received: by 2002:aa7:9a0b:0:b0:5dc:e57:e0e7 with SMTP id w11-20020aa79a0b000000b005dc0e57e0e7mr15941019pfj.22.1678351915471; Thu, 09 Mar 2023 00:51:55 -0800 (PST) Received: from localhost.localdomain ([220.158.158.11]) by smtp.gmail.com with ESMTPSA id u4-20020aa78484000000b005809d382016sm10638604pfn.74.2023.03.09.00.51.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Mar 2023 00:51:55 -0800 (PST) From: Manivannan Sadhasivam To: andersson@kernel.org, lpieralisi@kernel.org, kw@linux.com, krzysztof.kozlowski+dt@linaro.org, robh@kernel.org Cc: konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, quic_srichara@quicinc.com, Manivannan Sadhasivam Subject: [PATCH v2 10/17] PCI: qcom: Use bulk reset APIs for handling resets for IP rev 2.3.3 Date: Thu, 9 Mar 2023 14:20:55 +0530 Message-Id: <20230309085102.120977-11-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230309085102.120977-1-manivannan.sadhasivam@linaro.org> References: <20230309085102.120977-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org All the resets are asserted and deasserted at the same time. So the bulk reset APIs can be used to handle them together. This simplifies the code a lot. Signed-off-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pcie-qcom.c | 49 ++++++++++++-------------- 1 file changed, 23 insertions(+), 26 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 6b83e3627336..8c39fc554a89 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -170,9 +170,10 @@ struct qcom_pcie_resources_2_3_2 { }; #define QCOM_PCIE_2_3_3_MAX_CLOCKS 5 +#define QCOM_PCIE_2_3_3_MAX_RESETS 7 struct qcom_pcie_resources_2_3_3 { struct clk_bulk_data clks[QCOM_PCIE_2_3_3_MAX_CLOCKS]; - struct reset_control *rst[7]; + struct reset_control_bulk_data rst[QCOM_PCIE_2_3_3_MAX_RESETS]; }; #define QCOM_PCIE_2_4_0_MAX_CLOCKS 4 @@ -889,10 +890,6 @@ static int qcom_pcie_get_resources_2_3_3(struct qcom_pcie *pcie) struct qcom_pcie_resources_2_3_3 *res = &pcie->res.v2_3_3; struct dw_pcie *pci = pcie->pci; struct device *dev = pci->dev; - int i; - const char *rst_names[] = { "axi_m", "axi_s", "pipe", - "axi_m_sticky", "sticky", - "ahb", "sleep", }; int ret; res->clks[0].id = "iface"; @@ -905,11 +902,17 @@ static int qcom_pcie_get_resources_2_3_3(struct qcom_pcie *pcie) if (ret < 0) return ret; - for (i = 0; i < ARRAY_SIZE(rst_names); i++) { - res->rst[i] = devm_reset_control_get(dev, rst_names[i]); - if (IS_ERR(res->rst[i])) - return PTR_ERR(res->rst[i]); - } + res->rst[0].id = "axi_m"; + res->rst[1].id = "axi_s"; + res->rst[2].id = "pipe"; + res->rst[3].id = "axi_m_sticky"; + res->rst[4].id = "sticky"; + res->rst[5].id = "ahb"; + res->rst[6].id = "sleep"; + + ret = devm_reset_control_bulk_get_exclusive(dev, ARRAY_SIZE(res->rst), res->rst); + if (ret < 0) + return ret; return 0; } @@ -926,25 +929,20 @@ static int qcom_pcie_init_2_3_3(struct qcom_pcie *pcie) struct qcom_pcie_resources_2_3_3 *res = &pcie->res.v2_3_3; struct dw_pcie *pci = pcie->pci; struct device *dev = pci->dev; - int i, ret; + int ret; - for (i = 0; i < ARRAY_SIZE(res->rst); i++) { - ret = reset_control_assert(res->rst[i]); - if (ret) { - dev_err(dev, "reset #%d assert failed (%d)\n", i, ret); - return ret; - } + ret = reset_control_bulk_assert(ARRAY_SIZE(res->rst), res->rst); + if (ret < 0) { + dev_err(dev, "cannot assert resets\n"); + return ret; } usleep_range(2000, 2500); - for (i = 0; i < ARRAY_SIZE(res->rst); i++) { - ret = reset_control_deassert(res->rst[i]); - if (ret) { - dev_err(dev, "reset #%d deassert failed (%d)\n", i, - ret); - return ret; - } + ret = reset_control_bulk_deassert(ARRAY_SIZE(res->rst), res->rst); + if (ret < 0) { + dev_err(dev, "cannot deassert resets\n"); + return ret; } /* @@ -966,8 +964,7 @@ static int qcom_pcie_init_2_3_3(struct qcom_pcie *pcie) * Not checking for failure, will anyway return * the original failure in 'ret'. */ - for (i = 0; i < ARRAY_SIZE(res->rst); i++) - reset_control_assert(res->rst[i]); + reset_control_bulk_assert(ARRAY_SIZE(res->rst), res->rst); return ret; }