From patchwork Wed Mar 8 08:32:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 660574 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4CD55C6FD1E for ; Wed, 8 Mar 2023 08:34:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229587AbjCHIeB (ORCPT ); Wed, 8 Mar 2023 03:34:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57156 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230305AbjCHIdg (ORCPT ); Wed, 8 Mar 2023 03:33:36 -0500 Received: from mail-wr1-x42e.google.com (mail-wr1-x42e.google.com [IPv6:2a00:1450:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1542026CD5 for ; Wed, 8 Mar 2023 00:33:03 -0800 (PST) Received: by mail-wr1-x42e.google.com with SMTP id bx12so14517374wrb.11 for ; Wed, 08 Mar 2023 00:33:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678264381; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=mrjzbycvahC2qWo4+g2dlQgsce4F08+8FUswfvS3fdc=; b=vjIMj4YrRtXCIYL0GYTNI06bij3LwCKaY/BhO+GRH0cClgMCxoi7HlBCHXRrt4OwPw NchY00cYcr3fQSMs79jfFoUrv8UxI4e8t4ZpnN/76yjxRwLCaDlogZlO79vHQN6Mbwej JOCsW0fInPM5mkVLahhl+NA2obrELsJxm6qFrox29jsXXgPVogFDmu5sLqYKhhqwlVkM CQQt3Eurjj3Hb1KE1MxDdkuxHWhRVi40iwDoIMdNXFbuWJdzPzDZo2wSXRnzYGNac4Qa LCunR9fg2Z4U9iXsJO97RC6mcg8YBtZXmg/zKQ9lk9Q8nKaO50PviyrA63yxBqiEiEbm ksAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678264381; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=mrjzbycvahC2qWo4+g2dlQgsce4F08+8FUswfvS3fdc=; b=xqP9NIouP47X49LPjZTQ5myYPcclNz6OeOkMl5MGyIpAApOnHa4DpLToOgQciFUdoo 5Kv0TILCnHaWYI0kDpnFWhHLU3jC9LyTQkfs0xTXZMl99FGMokzlNVFxYsAQCULzN1n7 0mdLrD+nweH8PpQN7rcD6xxYVL6ya/7bVvs1XCinal6720c/lmgbYVUPBd7PqRfh/ThX GOk+ZhXqy6Nsg9cDLfGI1EtR6YD3S9rGFsF8ONd/kPFwKZqQjc0qvWdXF2zQPpml3dfM YVoFRwkMXkszDGXxJkhaiKRT2xBrVbbh3kyE0ZkB4dsPYKIeYsRwm3ARO7/RjGs5JojX Rmqw== X-Gm-Message-State: AO0yUKUwb32P/wYceFgsvdfwAByEVmddbBcUPw86cX43C8AFR9c/dTiR crqloZmBxmQpG0ABzyVLOjYt7g== X-Google-Smtp-Source: AK7set8oS+rGpxMJbjUjyrLII6bqdfrz7UWEgw0XQcKOu8pVfIoTB543vno3mUILoTr+ZTk2IziWEg== X-Received: by 2002:adf:f18a:0:b0:2c7:1d20:7743 with SMTP id h10-20020adff18a000000b002c71d207743mr11907012wro.21.1678264380980; Wed, 08 Mar 2023 00:33:00 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id n1-20020adffe01000000b002c4084d3472sm14797907wrr.58.2023.03.08.00.32.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Mar 2023 00:32:59 -0800 (PST) From: Neil Armstrong Date: Wed, 08 Mar 2023 09:32:54 +0100 Subject: [PATCH 3/3] arm64: dts: qcom: sm8550: misc style fixes MIME-Version: 1.0 Message-Id: <20230308-topic-sm8550-upstream-dt-fixups-v1-3-595b02067672@linaro.org> References: <20230308-topic-sm8550-upstream-dt-fixups-v1-0-595b02067672@linaro.org> In-Reply-To: <20230308-topic-sm8550-upstream-dt-fixups-v1-0-595b02067672@linaro.org> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Abel Vesa , Sai Prakash Ranjan Cc: Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.12.1 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Miscellaneous DT fixes to remove spurious blank line and enhance readability. Fixes: ffc50b2d3828 ("arm64: dts: qcom: Add base SM8550 dtsi") Fixes: d7da51db5b81 ("arm64: dts: qcom: sm8550: add display hardware devices") Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index c25c68257412..6208a6196090 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -412,7 +412,6 @@ xbl_sc_mem: xbl-sc-region@d8100000 { no-map; }; - hyp_tags_reserved_mem: hyp-tags-reserved-region@811d0000 { reg = <0 0x811d0000 0 0x30000>; no-map; @@ -2210,7 +2209,8 @@ mdss_dsi0: dsi@ae94000 { assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>; - assigned-clock-parents = <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>; + assigned-clock-parents = <&mdss_dsi0_phy 0>, + <&mdss_dsi0_phy 1>; operating-points-v2 = <&mdss_dsi_opp_table>; @@ -2302,8 +2302,10 @@ mdss_dsi1: dsi@ae96000 { power-domains = <&rpmhpd SM8550_MMCX>; - assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>; - assigned-clock-parents = <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>; + assigned-clocks = <&dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>, + <&dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>; + assigned-clock-parents = <&mdss_dsi1_phy 0>, + <&mdss_dsi1_phy 1>; operating-points-v2 = <&mdss_dsi_opp_table>; @@ -3171,7 +3173,7 @@ apps_smmu: iommu@15000000 { intc: interrupt-controller@17100000 { compatible = "arm,gic-v3"; - reg = <0 0x17100000 0 0x10000>, /* GICD */ + reg = <0 0x17100000 0 0x10000>, /* GICD */ <0 0x17180000 0 0x200000>; /* GICR * 8 */ ranges; #interrupt-cells = <3>;