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[83.9.32.99]) by smtp.gmail.com with ESMTPSA id e27-20020ac2547b000000b004cafa01ebbfsm552670lfn.101.2023.03.03.13.58.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Mar 2023 13:58:18 -0800 (PST) From: Konrad Dybcio Date: Fri, 03 Mar 2023 22:58:05 +0100 Subject: [PATCH 05/15] arm64: dts: qcom: sm6375: Add IMEM MIME-Version: 1.0 Message-Id: <20230303-topic-sm6375_features0_dts-v1-5-8c8d94fba6f0@linaro.org> References: <20230303-topic-sm6375_features0_dts-v1-0-8c8d94fba6f0@linaro.org> In-Reply-To: <20230303-topic-sm6375_features0_dts-v1-0-8c8d94fba6f0@linaro.org> To: Amit Kucheria , Thara Gopinath , Andy Gross , Bjorn Andersson , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Georgi Djakov , Sibi Sankar Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.12.1 X-Developer-Signature: v=1; a=ed25519-sha256; t=1677880689; l=952; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=XeByskUh4IJy5GUSRGVEOURhAeiNtSqMfR5ebBA6Oes=; b=4BGCWuRt4pHZDEFG5NnlENa82CtqJNl0M7IwD7B0smCe7QLF2yvSlwkP01BJ7lIgUrn6TL3n7+R7 Yqfs45A3AJM1sn6WX5CatJztLRKbi85YddngzJDzDLOMdYW9lsNU X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add a node for the IMEM block on SM6375. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm6375.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6375.dtsi b/arch/arm64/boot/dts/qcom/sm6375.dtsi index de5882c0ff81..5a0abb7f7124 100644 --- a/arch/arm64/boot/dts/qcom/sm6375.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6375.dtsi @@ -1233,6 +1233,20 @@ IPCC_MPROC_SIGNAL_GLINK_QMP }; }; + sram@c125000 { + compatible = "qcom,sm6375-imem", "syscon", "simple-mfd"; + reg = <0 0x0c125000 0 0x1000>; + ranges = <0 0 0x0c125000 0x1000>; + + #address-cells = <1>; + #size-cells = <1>; + + pil-reloc@94c { + compatible = "qcom,pil-reloc-info"; + reg = <0x94c 0xc8>; + }; + }; + apps_smmu: iommu@c600000 { compatible = "qcom,sm6375-smmu-500", "arm,mmu-500"; reg = <0 0x0c600000 0 0x100000>;