From patchwork Wed Feb 8 18:00:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 651756 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02EAEC636CC for ; Wed, 8 Feb 2023 18:01:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231938AbjBHSBQ (ORCPT ); Wed, 8 Feb 2023 13:01:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38664 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231764AbjBHSBD (ORCPT ); Wed, 8 Feb 2023 13:01:03 -0500 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [IPv6:2a00:1450:4864:20::332]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1C013530F6 for ; Wed, 8 Feb 2023 10:01:00 -0800 (PST) Received: by mail-wm1-x332.google.com with SMTP id f23-20020a05600c491700b003dff4480a17so2763470wmp.1 for ; Wed, 08 Feb 2023 10:00:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hOfyfk7Q5d8ZuEReqcuZAbA5feFof3LHf7PR/qaCNGw=; b=snxiqbD2t0eIQqzcB/zOrs8/m7MUstDCuKWn56QYMLhnYrPORnUhAZCJCQeuazcDd8 h6er5kso1tORG85oyMm9J+/fcKJZXXO+gtOz6EKuf3iydFTAmi2IBVUnqvcXNLFNHcUc G3j/GEt8ozBuozH+RUUzekKcKSL0mArGlHhu86b+eccP0sOwZb2TrEzGPb//HHpYN26I xNJI9JuC45dntIlh3xs+Iatcpdt0Eb9Anhc9eZGbFzps5ICWuLn/ZV06BxyWwHKg/o/r t4M/CTnQbLoFtuXUPYpfF9KXdUkQYjKhULsCwJCtKPaGNAV5zlM6vdnB+jAzz/UdIvyi KK/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hOfyfk7Q5d8ZuEReqcuZAbA5feFof3LHf7PR/qaCNGw=; b=E8M96myXk3zd1oz9g9rEhRJhHA5+GU+005Sbxhyg8z0xD5ffZ7DoDzNUUskX8eIc4+ s9cnevnP/Noke098xaSz5CiRxOEDP/csm5EAbWewBlEJP/ckjgb1HYaaZQHDxlNqWzmX 5EEbOqxN8q7FLSdqf+lqJUEiB4bxiMclLxguPzGmrmSktF6+ea5/PfTiKodEx4r12UVs UIfiBxAEmQOM8hvKVGiDjnLTbYBBP3yAVTJVHXAjIlcFubu2BiEX6J9cEqs8JexvVZD+ 90IdKYKKxbiS1g3g678judhjV3KBAqKgrU32qtFGaPK5g1Cj213Qqpm23drhbJXlsoAB 48CQ== X-Gm-Message-State: AO0yUKUtQeF9Qu0xrfKisvwr9mxUg/E2VVsghVq8C9hVnGDNMPixlcw7 Bhm0AfPbpi0/eF8AScP3I+xmdQ== X-Google-Smtp-Source: AK7set/hcDLTQlcyzvVtt++cAAZnC7FIrcoMBPsXzzIJhtny3cZPsVg4IerdSaXXrgRq2/qQdCRMgg== X-Received: by 2002:a05:600c:a68f:b0:3da:db4:6105 with SMTP id ip15-20020a05600ca68f00b003da0db46105mr7353259wmb.37.1675879258579; Wed, 08 Feb 2023 10:00:58 -0800 (PST) Received: from hackbox.lan ([94.52.112.99]) by smtp.gmail.com with ESMTPSA id k20-20020a05600c169400b003dc54eef495sm2370286wmn.24.2023.02.08.10.00.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Feb 2023 10:00:58 -0800 (PST) From: Abel Vesa To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Krzysztof Kozlowski , Lorenzo Pieralisi , "vkoul@kernel.org" , Kishon Vijay Abraham I , Manivannan Sadhasivam , Johan Hovold Cc: linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, Linux Kernel Mailing List Subject: [PATCH v9 07/11] phy: qcom-qmp: qserdes-lane-shared: Add v6 register offsets Date: Wed, 8 Feb 2023 20:00:16 +0200 Message-Id: <20230208180020.2761766-8-abel.vesa@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230208180020.2761766-1-abel.vesa@linaro.org> References: <20230208180020.2761766-1-abel.vesa@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The new SM8550 SoC bumps up the HW version of QMP phy to v6.20 for PCIE g4x2. Add the new lane shared PCIE specific offsets in a dedicated header file. Signed-off-by: Abel Vesa --- The v8 of this patch is: https://lore.kernel.org/all/20230206212619.3218741-8-abel.vesa@linaro.org/ Changes since v8: * none Changes since v7: * none Changes since v6: * none Changes since v5: * none Changes since v4: * none Changes since v3: * none Changes since v2: * none Changes since v1: * split all the offsets into separate patches, like Vinod suggested .../phy-qcom-qmp-qserdes-ln-shrd-v6.h | 32 +++++++++++++++++++ drivers/phy/qualcomm/phy-qcom-qmp.h | 1 + 2 files changed, 33 insertions(+) create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-qserdes-ln-shrd-v6.h diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-ln-shrd-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-ln-shrd-v6.h new file mode 100644 index 000000000000..86d7d796d5d7 --- /dev/null +++ b/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-ln-shrd-v6.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023, Linaro Limited + */ + +#ifndef QCOM_PHY_QMP_QSERDES_LN_SHRD_V6_H_ +#define QCOM_PHY_QMP_QSERDES_LN_SHRD_V6_H_ + +#define QSERDES_V6_LN_SHRD_RXCLK_DIV2_CTRL 0xa0 +#define QSERDES_V6_LN_SHRD_RX_Q_EN_RATES 0xb0 +#define QSERDES_V6_LN_SHRD_DFE_DAC_ENABLE1 0xb4 +#define QSERDES_V6_LN_SHRD_TX_ADAPT_POST_THRESH1 0xc4 +#define QSERDES_V6_LN_SHRD_TX_ADAPT_POST_THRESH2 0xc8 +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B0 0xd4 +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B1 0xd8 +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B2 0xdc +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B3 0xe0 +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B4 0xe4 +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B5 0xe8 +#define QSERDES_V6_LN_SHRD_RX_MODE_RATE_0_1_B6 0xec +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH1_RATE210 0xf0 +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH1_RATE3 0xf4 +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH2_RATE210 0xf8 +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH2_RATE3 0xfc +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH3_RATE210 0x100 +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH3_RATE3 0x104 +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH4_RATE3 0x10c +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH5_RATE3 0x114 +#define QSERDES_V6_LN_SHRD_RX_MARG_COARSE_THRESH6_RATE3 0x11c +#define QSERDES_V6_LN_SHRD_RX_SUMMER_CAL_SPD_MODE 0x128 + +#endif diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.h b/drivers/phy/qualcomm/phy-qcom-qmp.h index e5974e6caf51..148663ee713a 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp.h @@ -24,6 +24,7 @@ #include "phy-qcom-qmp-qserdes-com-v6.h" #include "phy-qcom-qmp-qserdes-txrx-v6.h" #include "phy-qcom-qmp-qserdes-txrx-v6_20.h" +#include "phy-qcom-qmp-qserdes-ln-shrd-v6.h" #include "phy-qcom-qmp-qserdes-pll.h"