From patchwork Fri Feb 10 10:34:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 652945 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 328FEC64ED6 for ; Fri, 10 Feb 2023 10:35:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232129AbjBJKfF (ORCPT ); Fri, 10 Feb 2023 05:35:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49708 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232105AbjBJKfC (ORCPT ); Fri, 10 Feb 2023 05:35:02 -0500 Received: from mail-wm1-x329.google.com (mail-wm1-x329.google.com [IPv6:2a00:1450:4864:20::329]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F35026D61D for ; Fri, 10 Feb 2023 02:35:00 -0800 (PST) Received: by mail-wm1-x329.google.com with SMTP id z13so3492303wmp.2 for ; Fri, 10 Feb 2023 02:35:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=sq7lndL52Sa02Q2fDxz5uSdATzz3Jf03VJ3oBm4uE2U=; b=XIY/lo278ClXz7D9cQfEyvcGN1KrD9b9nAi1UkgCpX7LhgzYe0+ze4Fs/sjEnZa9JM thSggsK6SD9qBSCXgjW6vdwDr0efXvjn9jgrmzUBdmzsSUR6Bev+D9fjn75qWnj9x7Jr Q5nxX30PnMg+m1rH6rvwHeNwZON5DJMSD0pPqJF1Hd8SN0ro4T0xtUPRZ6mcWCC/k81U m3S2oY+FOf8evA8+md5lF6iIqmVGGMJW+BswUktZgg4+F0sL4nzDaIEHOQQ+PzA5FVyh l9pxDsbkcELgMz7GxazgFFFjmRuF6JbJEow/7ZFidC+4CfkJN+QM4zDU988HAYapzbaV BBLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sq7lndL52Sa02Q2fDxz5uSdATzz3Jf03VJ3oBm4uE2U=; b=uaSDN4TSbvF22dIRPpIlzNoDV6wdIWQsSfXu/kdOKOait5zinCsyCkX1Vy2PfS+b2n kEywAjZ+lRZJTD7DgGnRvejMshCV5Z8KuftCk69EhGpGAcMmnxBl+vehxQJctBmgLVts sOaJoV3GGctZ0K8/pWugPP4NIybM6KmK0HC7O/5nZNFNvPLoJw6ughfFNg0MPu/oBvHL qYLuYrToc5yKxSIGOgKM6sMAEEogCcGLziCLnyJ0mJjo/uy9zKTIaFiEq+DlVH/TeOUG F3FJN2ogYoHB+cXNfbk+1xliihMgi2+p/c0sAxRLBcQG5pM3DKa/VfuKVftwxBeXNHhp Ur7w== X-Gm-Message-State: AO0yUKUtJy3Em2zAk2dRVIPeBKE3cVIWFyF0MoNBgOz9tajfywZBPP9S gbtLI68hT9XVS7eBVt0DUPUGpg== X-Google-Smtp-Source: AK7set+i8KWgqB2sIndU6HhKOe50o1pOYMq4mSeiSZoYyaLX5GQzV3cjTJU4qu4oL8VIRJs/pPF9Ng== X-Received: by 2002:a05:600c:43c4:b0:3dd:1b76:347f with SMTP id f4-20020a05600c43c400b003dd1b76347fmr12489882wmn.18.1676025299500; Fri, 10 Feb 2023 02:34:59 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id b18-20020a05600c4e1200b003e00c453447sm7937958wmq.48.2023.02.10.02.34.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Feb 2023 02:34:58 -0800 (PST) From: Neil Armstrong Date: Fri, 10 Feb 2023 11:34:53 +0100 Subject: [PATCH v2 4/5] arm64: dst: qcom: sm8450: switch to usb3/dp combo phy MIME-Version: 1.0 Message-Id: <20230206-topic-sm8450-upstream-dp-controller-v2-4-529da2203659@linaro.org> References: <20230206-topic-sm8450-upstream-dp-controller-v2-0-529da2203659@linaro.org> In-Reply-To: <20230206-topic-sm8450-upstream-dp-controller-v2-0-529da2203659@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Kuogee Hsieh , Andy Gross , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.12.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The QMP PHY is a USB3/DP combo phy, switch to the newly documented bindings and register the clocks to the GCC and DISPCC controllers. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 41 ++++++++++++------------------------ 1 file changed, 14 insertions(+), 27 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index d66dcd8fe61f..6248adc546f2 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -748,7 +748,7 @@ gcc: clock-controller@100000 { <&ufs_mem_phy_lanes 0>, <&ufs_mem_phy_lanes 1>, <&ufs_mem_phy_lanes 2>, - <0>; + <&usb_1_qmpphy 0>; clock-names = "bi_tcxo", "sleep_clk", "pcie_0_pipe_clk", @@ -2038,37 +2038,24 @@ usb_1_hsphy: phy@88e3000 { resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>; }; - usb_1_qmpphy: phy-wrapper@88e9000 { - compatible = "qcom,sm8450-qmp-usb3-phy"; - reg = <0 0x088e9000 0 0x200>, - <0 0x088e8000 0 0x20>; - status = "disabled"; - #address-cells = <2>; - #size-cells = <2>; - ranges; + usb_1_qmpphy: phy@88e8000 { + compatible = "qcom,sm8450-qmp-usb3-dp-phy"; + reg = <0 0x088e8000 0 0x4000>; clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, <&rpmhcc RPMH_CXO_CLK>, - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; - clock-names = "aux", "ref_clk_src", "com_aux"; + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names = "aux", "ref", "com_aux", "usb3_pipe"; resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, <&gcc GCC_USB3_PHY_PRIM_BCR>; reset-names = "phy", "common"; - usb_1_ssphy: phy@88e9200 { - reg = <0 0x088e9200 0 0x200>, - <0 0x088e9400 0 0x200>, - <0 0x088e9c00 0 0x400>, - <0 0x088e9600 0 0x200>, - <0 0x088e9800 0 0x200>, - <0 0x088e9a00 0 0x100>; - #phy-cells = <0>; - #clock-cells = <0>; - clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; - clock-names = "pipe0"; - clock-output-names = "usb3_phy_pipe_clk_src"; - }; + #clock-cells = <1>; + #phy-cells = <1>; + + status = "disabled"; }; remoteproc_slpi: remoteproc@2400000 { @@ -2976,8 +2963,8 @@ dispcc: clock-controller@af00000 { <&mdss_dsi0_phy 1>, <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>, - <0>, /* dp0 */ - <0>, + <&usb_1_qmpphy 0>, + <&usb_1_qmpphy 1>, <0>, /* dp1 */ <0>, <0>, /* dp2 */ @@ -4157,7 +4144,7 @@ usb_1_dwc3: usb@a600000 { iommus = <&apps_smmu 0x0 0x0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; - phys = <&usb_1_hsphy>, <&usb_1_ssphy>; + phys = <&usb_1_hsphy>, <&usb_1_qmpphy 0>; phy-names = "usb2-phy", "usb3-phy"; }; };