From patchwork Fri Feb 10 10:34:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 652946 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C2841C6379F for ; Fri, 10 Feb 2023 10:35:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232124AbjBJKfC (ORCPT ); Fri, 10 Feb 2023 05:35:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49696 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232102AbjBJKfA (ORCPT ); Fri, 10 Feb 2023 05:35:00 -0500 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [IPv6:2a00:1450:4864:20::335]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4A0F36D626 for ; Fri, 10 Feb 2023 02:34:58 -0800 (PST) Received: by mail-wm1-x335.google.com with SMTP id az4-20020a05600c600400b003dff767a1f1so3730753wmb.2 for ; Fri, 10 Feb 2023 02:34:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=n53b4yhBmViMDHIftiJB3ier3fKOOJs37AEPAgKOcQg=; b=RSnlTQDCCfHAOErowMFFxTs4pb9dI8nYYjfDl9uQHAlcrC3s0yXCgzTCYjQRdXSZzO irb3s1f12kNQQzfEFosdHTqEwG//KiSLRc0ZZAkI87k8aW91XlkhcO8cNux7JwJihVZE 45ZvxepMMBXXE4+SLVcDeQEQl0vC70jb+MOyYjnNsHLPiSbe15h81VpOfKMsTad879uU 4RawnBYDTewPrvCCQgHnsY8//SarnUQhXLPE8Us+ugXiNodhYrUwQ2aOtFh8YkKUVwkC JnACFlzNok9o2Ty8OUhHdJMCP8paoViiDbGychUJJcdyLHhb8EYk2yKI5iv4z9gDSNIG zPQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=n53b4yhBmViMDHIftiJB3ier3fKOOJs37AEPAgKOcQg=; b=gKYbOLivaU//GNM2pt0KO6kRBto6TaTKHVj0A+S5FU+fXKaTcNBm5d1yUFXOTQiIGT wDgObKMHj6Ym5DNkt7/qLeWEeCSJCaFvw4lEoLFWjgHapf/jIiOueNS4xhl9+uPwaSUY 2uqzK0FSh2WjivuGqUDz0eweGyPdz9zh6ay5ZCksdtLJpWIO8gikPDqNy0R9BzzEf/b/ +eS7s4ChL8BKneiCTEUvP3L46mQpoiQZ7z+9whZ12C+i3Fd6ZE7hBnLPaX6OI/POEhv0 9RXNGpr3qepO3ZVehX09klUF3D1TdHqH7HL57KdiJ1TR2vbYieTfy3WWOSJWOKeFGM+Q M5rw== X-Gm-Message-State: AO0yUKWbcZ5wMHzM1OSOPI2+cSSrAr3iJzV1AXdTAepXjpkHc9A1+M+X rk+w5n6Y1ieUbeusknAreGgNMw== X-Google-Smtp-Source: AK7set9g8Fu4kd0Db899Uo2PhLO+UrrHHiJ4YcvCzV57yKjNKPYfH/PniBR1H2ovCBb9D0ZqgwpAuw== X-Received: by 2002:a05:600c:491d:b0:3da:2a78:d7a4 with SMTP id f29-20020a05600c491d00b003da2a78d7a4mr12458184wmp.21.1676025296824; Fri, 10 Feb 2023 02:34:56 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:8261:5fff:fe11:bdda]) by smtp.gmail.com with ESMTPSA id b18-20020a05600c4e1200b003e00c453447sm7937958wmq.48.2023.02.10.02.34.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 10 Feb 2023 02:34:56 -0800 (PST) From: Neil Armstrong Date: Fri, 10 Feb 2023 11:34:51 +0100 Subject: [PATCH v2 2/5] arm64: dts: qcom: sm8350: switch to combo usb3/dp phy MIME-Version: 1.0 Message-Id: <20230206-topic-sm8450-upstream-dp-controller-v2-2-529da2203659@linaro.org> References: <20230206-topic-sm8450-upstream-dp-controller-v2-0-529da2203659@linaro.org> In-Reply-To: <20230206-topic-sm8450-upstream-dp-controller-v2-0-529da2203659@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Kuogee Hsieh , Andy Gross , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong X-Mailer: b4 0.12.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The first QMP PHY is an USB3/DP combo phy, switch to the newly documented bindings and register the clocks to the GCC and DISPCC controllers. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 40 ++++++++++++------------------------ 1 file changed, 13 insertions(+), 27 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 04bb838189a6..d490ce84a022 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -652,7 +652,7 @@ gcc: clock-controller@100000 { <&ufs_mem_phy_lanes 0>, <&ufs_mem_phy_lanes 1>, <&ufs_mem_phy_lanes 2>, - <0>, + <&usb_1_qmpphy 0>, <0>; }; @@ -2601,37 +2601,24 @@ usb_2_hsphy: phy@88e4000 { resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; }; - usb_1_qmpphy: phy-wrapper@88e9000 { - compatible = "qcom,sm8350-qmp-usb3-phy"; - reg = <0 0x088e9000 0 0x200>, - <0 0x088e8000 0 0x20>; - status = "disabled"; - #address-cells = <2>; - #size-cells = <2>; - ranges; + usb_1_qmpphy: phy@88e9000 { + compatible = "qcom,sm8350-qmp-usb3-dp-phy"; + reg = <0 0x088e8000 0 0x3000>; clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, <&rpmhcc RPMH_CXO_CLK>, - <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>; - clock-names = "aux", "ref_clk_src", "com_aux"; + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>, + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; + clock-names = "aux", "ref", "com_aux", "usb3_pipe"; resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>, <&gcc GCC_USB3_PHY_PRIM_BCR>; reset-names = "phy", "common"; - usb_1_ssphy: phy@88e9200 { - reg = <0 0x088e9200 0 0x200>, - <0 0x088e9400 0 0x200>, - <0 0x088e9c00 0 0x400>, - <0 0x088e9600 0 0x200>, - <0 0x088e9800 0 0x200>, - <0 0x088e9a00 0 0x100>; - #phy-cells = <0>; - #clock-cells = <0>; - clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>; - clock-names = "pipe0"; - clock-output-names = "usb3_phy_pipe_clk_src"; - }; + #clock-cells = <1>; + #phy-cells = <1>; + + status = "disabled"; }; usb_2_qmpphy: phy-wrapper@88eb000 { @@ -2727,7 +2714,7 @@ usb_1_dwc3: usb@a600000 { iommus = <&apps_smmu 0x0 0x0>; snps,dis_u2_susphy_quirk; snps,dis_enblslpm_quirk; - phys = <&usb_1_hsphy>, <&usb_1_ssphy>; + phys = <&usb_1_hsphy>, <&usb_1_qmpphy 0>; phy-names = "usb2-phy", "usb3-phy"; }; }; @@ -3092,8 +3079,7 @@ dispcc: clock-controller@af00000 { clocks = <&rpmhcc RPMH_CXO_CLK>, <&mdss_dsi0_phy 0>, <&mdss_dsi0_phy 1>, <&mdss_dsi1_phy 0>, <&mdss_dsi1_phy 1>, - <0>, - <0>; + <&usb_1_qmpphy 1>, <&usb_1_qmpphy 2>; clock-names = "bi_tcxo", "dsi0_phy_pll_out_byteclk", "dsi0_phy_pll_out_dsiclk",