From patchwork Thu Feb 2 15:54:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 649703 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5BF5EC64EC4 for ; Thu, 2 Feb 2023 15:55:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233373AbjBBPzo (ORCPT ); Thu, 2 Feb 2023 10:55:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57470 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233203AbjBBPzG (ORCPT ); Thu, 2 Feb 2023 10:55:06 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 296FF6384A; Thu, 2 Feb 2023 07:54:56 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id A165261C28; Thu, 2 Feb 2023 15:54:45 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EE46FC4323C; Thu, 2 Feb 2023 15:54:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1675353285; bh=8WuJFfnUpK90ylTPuREpqxZk3Bc9oC9nAf9c/rnnkIc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FeD7H3IzV+I+4XrgT+v/Klglf9+0UO6heJbbtpxEb48QRurjJWnQ5m0V4dWzGxALV TdlG3waIZZz+m2P7W2wMBNCTaONXLjiip45k7HF3vQuiWDkLn2Dx2zUqe/7Kduy7Oz qVs3O04JEl3WcNkqVjBaZmSXqAjT8Lj/z8QDwNz1c6flzJtmUt9Wzt1ULYRQQwJUW7 4Gsa/6aBhSprNfJdH3zC07e/8hitp7xdmWsTqGoyYZHIIbzK/Nga31kVHQEc2AMuZ/ r5G/AxfPGMvnsF67r3XZcDzI9a92DQT21tdsfRunNnRYj2VC+eEx9oDAJWPApsGzAg B2z8dnujugTKQ== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1pNbvZ-0001mR-U0; Thu, 02 Feb 2023 16:55:09 +0100 From: Johan Hovold To: Alexandre Belloni , Bjorn Andersson Cc: Andy Gross , Konrad Dybcio , Alessandro Zummo , Rob Herring , Krzysztof Kozlowski , Maximilian Luz , linux-arm-msm@vger.kernel.org, linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , Krzysztof Kozlowski Subject: [PATCH v2 16/22] dt-bindings: rtc: qcom-pm8xxx: add nvmem-cell offset Date: Thu, 2 Feb 2023 16:54:42 +0100 Message-Id: <20230202155448.6715-17-johan+linaro@kernel.org> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230202155448.6715-1-johan+linaro@kernel.org> References: <20230202155448.6715-1-johan+linaro@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On many Qualcomm platforms the PMIC RTC control and time registers are read-only so that the RTC time can not be updated. Instead an offset needs be stored in some machine-specific non-volatile memory, which a driver can take into account. Add an 'offset' nvmem cell which can be used to store a 32-bit offset from the Unix epoch so that the RTC time can be updated on such platforms. Acked-by: Krzysztof Kozlowski Signed-off-by: Johan Hovold Reviewed-by: David Collins --- .../devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml b/Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml index 21c8ea08ff0a..b95a69cc9ae0 100644 --- a/Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/qcom-pm8xxx-rtc.yaml @@ -40,6 +40,16 @@ properties: description: Indicates that the setting of RTC time is allowed by the host CPU. + nvmem-cells: + items: + - description: + four-byte nvmem cell holding a little-endian offset from the Unix + epoch representing the time when the RTC timer was last reset + + nvmem-cell-names: + items: + - const: offset + wakeup-source: true required: @@ -69,6 +79,8 @@ examples: compatible = "qcom,pm8921-rtc"; reg = <0x11d>; interrupts = <0x27 0>; + nvmem-cells = <&rtc_offset>; + nvmem-cell-names = "offset"; }; }; };