From patchwork Thu Jan 19 14:04:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 645170 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1510FC004D4 for ; Thu, 19 Jan 2023 14:05:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231397AbjASOFP (ORCPT ); Thu, 19 Jan 2023 09:05:15 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60954 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231363AbjASOFK (ORCPT ); Thu, 19 Jan 2023 09:05:10 -0500 Received: from mail-wm1-x32b.google.com (mail-wm1-x32b.google.com [IPv6:2a00:1450:4864:20::32b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 51F255267 for ; Thu, 19 Jan 2023 06:05:09 -0800 (PST) Received: by mail-wm1-x32b.google.com with SMTP id f25-20020a1c6a19000000b003da221fbf48so1350987wmc.1 for ; Thu, 19 Jan 2023 06:05:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Ce3GwxxXOOj5HeCb74kK7+aZTfEk+p7txbLlzWZ97D4=; b=Cmkd+Z2GfmQTvd6eFx6R1DDs1KpZqnMU8En6l7oSp7NmCCy/BbOORPcaxzp9ACTyi1 TsK1YaPjJP84b/leGMn+O3isF7vtWV2ItIrD5VQWonFM+OX5Nd6i97koD1X3pD5D4Qi+ MhH3CXL8SjVKRpRcpMCJYRjK4ej6SwEInoM7ScAlelID6n3JVcf1zcYxwvMkmS7y3HKh lva1WWneVM/3flFAKlFYfbg3bP+fJeQylntwTh2UImtEgi2QxRuQa7+ps22RWPCP3/Mp SR+fmVmx40N9LBCbf4GuFJpR7OsyZG0H8BjsXIMV5a1bOrHo7D6u77wn9AI9DBlVTp9E WHxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ce3GwxxXOOj5HeCb74kK7+aZTfEk+p7txbLlzWZ97D4=; b=vKn0980NeMQyWyAMsBu7BYq/glThAXeMoFnx5986eWgndFHsZe30WaKDBkiH724RFB aRUpQBvWe7ewTbuhoeZpyn6U1eQ91UANS1oulzjgYL3/UfXeVdei7vGndU6pz2Wh/jvJ vswzPTTdahP3xRpTEhesIyQW/jtpVdGivxG4DflmNsbdNKjxA1toxpmgdbeRf0woyCKO /GJtnaP9ur5hp1AqhmDtIReOzohfKi9JciLmOk1pe5thMxJhwxqfQRaSuAvBfL4WjTmZ j3m3BFt/V/asTMD5WPf1IjOujVfP9KEbG57QyiNzXpcvwv3EvnXbsWUXtJsaih9zPYib gv+w== X-Gm-Message-State: AFqh2kqdt9FMga/+/zYEht19u4WpAt4L9dniyBoJEpVI6P9lxi/51b8H FowcLzOctljWUSFpUWDnt58nNw== X-Google-Smtp-Source: AMrXdXtcAuLaS3MOfvSXDJI30N+6dJW31PjjvVsqP7Ilrb4FzpvP5BWDXEHZiJBCI/gBfrNh0c9pAw== X-Received: by 2002:a05:600c:510d:b0:3da:f719:50cd with SMTP id o13-20020a05600c510d00b003daf71950cdmr10036297wms.18.1674137107854; Thu, 19 Jan 2023 06:05:07 -0800 (PST) Received: from hackbox.lan ([94.52.112.99]) by smtp.gmail.com with ESMTPSA id m10-20020a05600c4f4a00b003d96efd09b7sm5263883wmq.19.2023.01.19.06.05.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Jan 2023 06:05:07 -0800 (PST) From: Abel Vesa To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Lorenzo Pieralisi , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Krzysztof Kozlowski , Lorenzo Pieralisi , "vkoul@kernel.org" , Kishon Vijay Abraham I , Manivannan Sadhasivam Cc: linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, Linux Kernel Mailing List Subject: [PATCH v4 01/12] dt-bindings: phy: Add QMP PCIe PHY comptible for SM8550 Date: Thu, 19 Jan 2023 16:04:42 +0200 Message-Id: <20230119140453.3942340-2-abel.vesa@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230119140453.3942340-1-abel.vesa@linaro.org> References: <20230119140453.3942340-1-abel.vesa@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the QMP PCIe PHY compatible for SM8550. Signed-off-by: Abel Vesa --- This patchset relies on the following patchset: https://lore.kernel.org/all/20230117224148.1914627-1-abel.vesa@linaro.org/ The v3 of this patchset is: https://lore.kernel.org/all/20230118005328.2378792-1-abel.vesa@linaro.org/ Changes since v3: * increased the allowed number of resets to allow ncsr reset * added vdda-qref-supply which is used by pcie1_phy node in MTP dts * added both compatibles to the allOf:if:then clause to constrain the number of possible clocks to 5 Changes since v2: * added back the binding compatible update patch Changes since v1: * split all the offsets into separate patches, like Vinod suggested .../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml index 8a85318d9c92..4b4566f90811 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml @@ -20,6 +20,8 @@ properties: - qcom,sc8280xp-qmp-gen3x2-pcie-phy - qcom,sc8280xp-qmp-gen3x4-pcie-phy - qcom,sm8350-qmp-gen3x1-pcie-phy + - qcom,sm8550-qmp-gen3x2-pcie-phy + - qcom,sm8550-qmp-gen4x2-pcie-phy reg: minItems: 1 @@ -43,16 +45,21 @@ properties: maxItems: 1 resets: - maxItems: 1 + minItems: 1 + maxItems: 2 reset-names: + minItems: 1 items: - const: phy + - const: nocsr vdda-phy-supply: true vdda-pll-supply: true + vdda-qref-supply: true + qcom,4ln-config-sel: description: PCIe 4-lane configuration $ref: /schemas/types.yaml#/definitions/phandle-array @@ -113,6 +120,8 @@ allOf: contains: enum: - qcom,sm8350-qmp-gen3x1-pcie-phy + - qcom,sm8550-qmp-gen3x2-pcie-phy + - qcom,sm8550-qmp-gen4x2-pcie-phy then: properties: clocks: