| Message ID | 20230118032432.1716616-3-dmitry.baryshkov@linaro.org |
|---|---|
| State | Accepted |
| Commit | 2f8e5f8b2ea4bb1508cfc5b0647e0967a7ba0f3b |
| Headers | show |
| Series | dt-bindings: display/msm: more dsi-controller fixes | expand |
diff --git a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml index b07bdddc1570..357036470b1f 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml +++ b/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml @@ -83,12 +83,16 @@ properties: 2 DSI links. assigned-clocks: - maxItems: 2 + minItems: 2 + maxItems: 4 description: | Parents of "byte" and "pixel" for the given platform. + For DSIv2 platforms this should contain "byte", "esc", "src" and + "pixel_src" clocks. assigned-clock-parents: - maxItems: 2 + minItems: 2 + maxItems: 4 description: | The Byte clock and Pixel clock PLL outputs provided by a DSI PHY block.
APQ8064 requires listing four clocks in the assigned-clocks / assigned-clock-parents properties. Account for that. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- .../bindings/display/msm/dsi-controller-main.yaml | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)