@@ -32,6 +32,10 @@ wcd9340: codec@1,0 {
#clock-cells = <0>;
clock-frequency = <9600000>;
clock-output-names = "mclk";
+
+ pinctrl-0 = <&wcd_intr_default>;
+ pinctrl-names = "default";
+
qcom,micbias1-microvolt = <1800000>;
qcom,micbias2-microvolt = <1800000>;
qcom,micbias3-microvolt = <1800000>;
@@ -67,3 +71,14 @@ swm: swm@c85 {
};
};
};
+
+&tlmm {
+ wcd_intr_default: wcd-intr-default-state {
+ pins = "gpio54";
+ function = "gpio";
+
+ input-enable;
+ bias-pull-down;
+ drive-strength = <2>;
+ };
+};
@@ -971,15 +971,6 @@ sdc2_card_det_n: sd-card-det-n-state {
function = "gpio";
bias-pull-up;
};
-
- wcd_intr_default: wcd-intr-default-state {
- pins = "gpio54";
- function = "gpio";
-
- input-enable;
- bias-pull-down;
- drive-strength = <2>;
- };
};
&uart3 {
@@ -1085,8 +1076,6 @@ &venus {
};
&wcd9340 {
- pinctrl-0 = <&wcd_intr_default>;
- pinctrl-names = "default";
clock-names = "extclk";
clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
@@ -466,15 +466,6 @@ sdc2_card_det_n: sd-card-det-n-state {
function = "gpio";
bias-pull-up;
};
-
- wcd_intr_default: wcd-intr-default-state {
- pins = "gpio54";
- function = "gpio";
-
- input-enable;
- bias-pull-down;
- drive-strength = <2>;
- };
};
&uart6 {
@@ -543,8 +534,6 @@ &venus {
};
&wcd9340 {
- pinctrl-0 = <&wcd_intr_default>;
- pinctrl-names = "default";
clock-names = "extclk";
clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
@@ -616,14 +616,6 @@ sde_dsi_suspend: sde-dsi-suspend-state {
drive-strength = <2>;
bias-pull-down;
};
-
- wcd_intr_default: wcd-intr-default-state {
- pins = "gpio54";
- function = "gpio";
- input-enable;
- bias-pull-down;
- drive-strength = <2>;
- };
};
&uart6 {
@@ -700,8 +692,6 @@ &venus {
};
&wcd9340 {
- pinctrl-0 = <&wcd_intr_default>;
- pinctrl-names = "default";
clock-names = "extclk";
clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
@@ -628,15 +628,6 @@ i2c11_hid_active: i2c11-hid-active-state {
drive-strength = <2>;
};
- wcd_intr_default: wcd-intr-default-state {
- pins = "gpio54";
- function = "gpio";
-
- input-enable;
- bias-pull-down;
- drive-strength = <2>;
- };
-
lid_pin_active: lid-pin-state {
pins = "gpio124";
function = "gpio";
@@ -747,8 +738,6 @@ &venus {
};
&wcd9340 {
- pinctrl-0 = <&wcd_intr_default>;
- pinctrl-names = "default";
clock-names = "extclk";
clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
@@ -552,15 +552,6 @@ pen_rst_l: pen-rst-l-state {
*/
output-high;
};
-
- wcd_intr_default: wcd-intr-default-state {
- pins = "gpio54";
- function = "gpio";
-
- input-enable;
- bias-pull-down;
- drive-strength = <2>;
- };
};
&uart6 {
@@ -656,8 +647,6 @@ &venus {
};
&wcd9340 {
- pinctrl-0 = <&wcd_intr_default>;
- pinctrl-names = "default";
clock-names = "extclk";
clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
Pin configuration fow WCD9340 is the same in all users, so move it to common file to reduce the code duplication (which still allows further customizations per board). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- .../arm64/boot/dts/qcom/sdm845-audio-wcd9340.dtsi | 15 +++++++++++++++ arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 11 ----------- .../dts/qcom/sdm845-xiaomi-beryllium-common.dtsi | 11 ----------- .../arm64/boot/dts/qcom/sdm845-xiaomi-polaris.dts | 10 ---------- .../boot/dts/qcom/sdm850-lenovo-yoga-c630.dts | 11 ----------- arch/arm64/boot/dts/qcom/sdm850-samsung-w737.dts | 11 ----------- 6 files changed, 15 insertions(+), 54 deletions(-)