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[88.156.142.67]) by smtp.gmail.com with ESMTPSA id p1-20020ac24ec1000000b004b15bc0ff63sm3520874lfr.277.2022.12.30.08.01.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Dec 2022 08:01:49 -0800 (PST) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 7/7] arm64: dts: qcom: sm8450: align PSCI domain names with DT schema Date: Fri, 30 Dec 2022 17:01:03 +0100 Message-Id: <20221230160103.250996-7-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221230160103.250996-1-krzysztof.kozlowski@linaro.org> References: <20221230160103.250996-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Bindings expect power domains to follow generic naming pattern: sm8450-qrd.dtb: psci: 'cpu-cluster0', 'cpu0', 'cpu1', 'cpu2', 'cpu3', 'cpu4', 'cpu5', 'cpu6', 'cpu7' do not match any of the regexes: '^power-domain-', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sm8450.dtsi | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index 33db6b6c4123..5530bdee6f25 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -311,55 +311,55 @@ psci { compatible = "arm,psci-1.0"; method = "smc"; - CPU_PD0: cpu0 { + CPU_PD0: power-domain-cpu0 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; domain-idle-states = <&LITTLE_CPU_SLEEP_0>; }; - CPU_PD1: cpu1 { + CPU_PD1: power-domain-cpu1 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; domain-idle-states = <&LITTLE_CPU_SLEEP_0>; }; - CPU_PD2: cpu2 { + CPU_PD2: power-domain-cpu2 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; domain-idle-states = <&LITTLE_CPU_SLEEP_0>; }; - CPU_PD3: cpu3 { + CPU_PD3: power-domain-cpu3 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; domain-idle-states = <&LITTLE_CPU_SLEEP_0>; }; - CPU_PD4: cpu4 { + CPU_PD4: power-domain-cpu4 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; domain-idle-states = <&BIG_CPU_SLEEP_0>; }; - CPU_PD5: cpu5 { + CPU_PD5: power-domain-cpu5 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; domain-idle-states = <&BIG_CPU_SLEEP_0>; }; - CPU_PD6: cpu6 { + CPU_PD6: power-domain-cpu6 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; domain-idle-states = <&BIG_CPU_SLEEP_0>; }; - CPU_PD7: cpu7 { + CPU_PD7: power-domain-cpu7 { #power-domain-cells = <0>; power-domains = <&CLUSTER_PD>; domain-idle-states = <&BIG_CPU_SLEEP_0>; }; - CLUSTER_PD: cpu-cluster0 { + CLUSTER_PD: power-domain-cpu-cluster0 { #power-domain-cells = <0>; domain-idle-states = <&CLUSTER_SLEEP_0>, <&CLUSTER_SLEEP_1>; };