From patchwork Thu Dec 29 19:18:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 637579 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85CBFC4332F for ; Thu, 29 Dec 2022 19:19:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233995AbiL2TTY (ORCPT ); Thu, 29 Dec 2022 14:19:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38730 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233553AbiL2TTU (ORCPT ); Thu, 29 Dec 2022 14:19:20 -0500 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 518E5140A1 for ; Thu, 29 Dec 2022 11:19:19 -0800 (PST) Received: by mail-lf1-x12e.google.com with SMTP id j17so19247852lfr.3 for ; Thu, 29 Dec 2022 11:19:19 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=T56voTK7b2K1vHMG2HmJVyspDzmZqS3rg5P5AFvBOX4=; b=YKkvNOHKhoqL21AGNwiZKNA4CyabMpCQeNg9y1QNlU/reb7cRX3MP+2A6RH5BNt7qE KwDgy5HS4FEzeuhhX5DXnNpkoI8ksIbHZf5H1+a6NFYHEFd6dKBcADE3E3Kx6nUxolm3 Tasw+nGKSuXHLxB6e3HqfzT/mfhzjLhBVU1/s6vOoezLF758DJZOOHf7lZZoRIHbVLwH qTTtWBNvfls94rREr6Upt/fqRxz1qNwlNqv+cmXjzYjsFB/rUvAGgJr8hW+ZtIvxWRfT dpnzkjiky/z7hezCMWNryTpA0RKpIa03PhjicngQghAet1euZ/WJQys6p5xvWgFz2ky2 bCGw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=T56voTK7b2K1vHMG2HmJVyspDzmZqS3rg5P5AFvBOX4=; b=60V6MLDOZhPdjS6A/wH1UJlC7w+PFQ9Irmxrvv9PW6wCrFPzkqc6onLP780N9ZB5L+ XZAlQ7Qa0vP7VlfZG+KyqeTULedeT9rQTGUECYK+FxR+gbeSh0kK/wYiODB9QZ44qxrv KeTZDZVPBxTG/03jaTWlbeLsRvFMcSTgm2onOFYSdy2xcePkaEtiCXIWB97pb11A6i97 7IeTyMVGpk3FgK2C10eifd5Lhb8/sz9ZyMwSSsLQWGaFrBONhwIYFSLTVbP/ysVNQXYW AruRnz/bKkJIOdGelGyBwm7qy99VJ2zv6orTpjsYz+Qfv8tTeDRscAZC6lmLHqH1PLnX LH3Q== X-Gm-Message-State: AFqh2koKkCPwtO0Ofx7fP17WRK+bx+ZG498kIJk0utHe+KFH2JJz9N0A vK8iIqwAgEP2R2+/2y/HfpV+pQ== X-Google-Smtp-Source: AMrXdXvrsIeTwFLFdoveipRTBi092sgSZK6m4vN3JoRDzkSjRNvOwUSUbo7Xzy6udByTf6AeiDH2Kg== X-Received: by 2002:a05:6512:695:b0:4b5:2bbc:e119 with SMTP id t21-20020a056512069500b004b52bbce119mr15070428lfe.65.1672341558905; Thu, 29 Dec 2022 11:19:18 -0800 (PST) Received: from eriador.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id t13-20020ac24c0d000000b004cb10c151fasm1162295lfq.88.2022.12.29.11.19.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 29 Dec 2022 11:19:18 -0800 (PST) From: Dmitry Baryshkov To: Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , Bjorn Andersson , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v2 21/27] drm/msm/dpu: make _dpu_plane_calc_clk accept mode directly Date: Thu, 29 Dec 2022 21:18:50 +0200 Message-Id: <20221229191856.3508092-22-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20221229191856.3508092-1-dmitry.baryshkov@linaro.org> References: <20221229191856.3508092-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Rework bandwidth/clock calculation functions to use mode directly rather than fetching it through the plane data. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 39 ++++++++++------------- 1 file changed, 17 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index 7fc2c767c6d1..3d0c5a36a7dc 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -127,20 +127,19 @@ static struct dpu_kms *_dpu_plane_get_kms(struct drm_plane *plane) /** * _dpu_plane_calc_bw - calculate bandwidth required for a plane - * @plane: Pointer to drm plane. + * @catalog: Points to dpu catalog structure * @fmt: Pointer to source buffer format + * @mode: Pointer to drm display mode * @pipe_cfg: Pointer to pipe configuration * Result: Updates calculated bandwidth in the plane state. * BW Equation: src_w * src_h * bpp * fps * (v_total / v_dest) * Prefill BW Equation: line src bytes * line_time */ -static void _dpu_plane_calc_bw(struct drm_plane *plane, +static u64 _dpu_plane_calc_bw(const struct dpu_mdss_cfg *catalog, const struct dpu_format *fmt, + const struct drm_display_mode *mode, struct dpu_hw_pipe_cfg *pipe_cfg) { - struct dpu_plane_state *pstate; - struct drm_display_mode *mode; - struct dpu_kms *dpu_kms = _dpu_plane_get_kms(plane); int src_width, src_height, dst_height, fps; u64 plane_prefill_bw; u64 plane_bw; @@ -148,9 +147,6 @@ static void _dpu_plane_calc_bw(struct drm_plane *plane, u64 scale_factor; int vbp, vpw, vfp; - pstate = to_dpu_plane_state(plane->state); - mode = &plane->state->crtc->mode; - src_width = drm_rect_width(&pipe_cfg->src_rect); src_height = drm_rect_height(&pipe_cfg->src_rect); dst_height = drm_rect_height(&pipe_cfg->dst_rect); @@ -158,7 +154,7 @@ static void _dpu_plane_calc_bw(struct drm_plane *plane, vbp = mode->vtotal - mode->vsync_end; vpw = mode->vsync_end - mode->vsync_start; vfp = mode->vsync_start - mode->vdisplay; - hw_latency_lines = dpu_kms->catalog->perf->min_prefill_lines; + hw_latency_lines = catalog->perf->min_prefill_lines; scale_factor = src_height > dst_height ? mult_frac(src_height, 1, dst_height) : 1; @@ -178,37 +174,36 @@ static void _dpu_plane_calc_bw(struct drm_plane *plane, do_div(plane_prefill_bw, hw_latency_lines); - pstate->plane_fetch_bw = max(plane_bw, plane_prefill_bw); + return max(plane_bw, plane_prefill_bw); } /** * _dpu_plane_calc_clk - calculate clock required for a plane - * @plane: Pointer to drm plane. + * @mode: Pointer to drm display mode * @pipe_cfg: Pointer to pipe configuration * Result: Updates calculated clock in the plane state. * Clock equation: dst_w * v_total * fps * (src_h / dst_h) */ -static void _dpu_plane_calc_clk(struct drm_plane *plane, struct dpu_hw_pipe_cfg *pipe_cfg) +static u64 _dpu_plane_calc_clk(const struct drm_display_mode *mode, + struct dpu_hw_pipe_cfg *pipe_cfg) { - struct dpu_plane_state *pstate; - struct drm_display_mode *mode; int dst_width, src_height, dst_height, fps; - - pstate = to_dpu_plane_state(plane->state); - mode = &plane->state->crtc->mode; + u64 plane_clk; src_height = drm_rect_height(&pipe_cfg->src_rect); dst_width = drm_rect_width(&pipe_cfg->dst_rect); dst_height = drm_rect_height(&pipe_cfg->dst_rect); fps = drm_mode_vrefresh(mode); - pstate->plane_clk = + plane_clk = dst_width * mode->vtotal * fps; if (src_height > dst_height) { - pstate->plane_clk *= src_height; - do_div(pstate->plane_clk, dst_height); + plane_clk *= src_height; + do_div(plane_clk, dst_height); } + + return plane_clk; } /** @@ -1201,9 +1196,9 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane) _dpu_plane_set_qos_remap(plane, pipe); } - _dpu_plane_calc_bw(plane, fmt, &pstate->pipe_cfg); + pstate->plane_fetch_bw = _dpu_plane_calc_bw(pdpu->catalog, fmt, &crtc->mode, &pstate->pipe_cfg); - _dpu_plane_calc_clk(plane, &pstate->pipe_cfg); + pstate->plane_clk = _dpu_plane_calc_clk(&crtc->mode, &pstate->pipe_cfg); } static void _dpu_plane_atomic_disable(struct drm_plane *plane)