From patchwork Wed Dec 21 17:14:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akhil P Oommen X-Patchwork-Id: 636046 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EBA46C10F1B for ; Wed, 21 Dec 2022 17:15:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234874AbiLURPr (ORCPT ); Wed, 21 Dec 2022 12:15:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53986 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230103AbiLURPT (ORCPT ); Wed, 21 Dec 2022 12:15:19 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1EEF8B4B; Wed, 21 Dec 2022 09:14:42 -0800 (PST) Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2BLGnphm011216; Wed, 21 Dec 2022 17:14:35 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=SFm4sYMp/c3P2qEYhneJ47yxJuztQysWAUYzINhpWsw=; b=nbThkgGfnr/hDxuQZA6CLIEsqT80aXNWs0kBDnIAbQRZV0AUhb/LLkBI8DPg77Fby7f+ aPhC7OlWly/h7f6yKRux29fJmKqeijuqiYajlmMBFhGUp7wcEdFwD0W2HZezHyj4dqQ2 GD8ZvUz2eXX3zDh2s0NBvgSnCFnDnF3aALrfF0kXREOiTP4tM/tQTcRDSmqFl9nwFasV IrQlL7fEHeA0CKVCM2OzvqCSm3Xyu+/8s+xg18SDfm8nFOwEIOfERPUxtUQclppyGdt4 TenQjFkiUgPZpTYdSbXPl/jjEscsbT7uJTWktV2vQDFUAi0yUwerVDMTqVKY+B/7qa1d tg== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3mm4xkr6ma-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 21 Dec 2022 17:14:35 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2BLHEYH1022866 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 21 Dec 2022 17:14:34 GMT Received: from hyd-lnxbld559.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Wed, 21 Dec 2022 09:14:30 -0800 From: Akhil P Oommen To: freedreno , , , Rob Clark , Ulf Hansson , Bjorn Andersson , Stephen Boyd , Philipp Zabel CC: Akhil P Oommen , Andy Gross , Konrad Dybcio , Michael Turquette , , Subject: [PATCH v4 2/5] clk: qcom: gdsc: Support 'synced_poweroff' genpd flag Date: Wed, 21 Dec 2022 22:44:00 +0530 Message-ID: <20221221224338.v4.2.Ic128c1df50b7fc9a6b919932a3b41a799b5ed5e8@changeid> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1671642843-5244-1-git-send-email-quic_akhilpo@quicinc.com> References: <1671642843-5244-1-git-send-email-quic_akhilpo@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: a6rJ0FJEmWy7j7LoqvQEdWLJ-f2Uw8Np X-Proofpoint-ORIG-GUID: a6rJ0FJEmWy7j7LoqvQEdWLJ-f2Uw8Np X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-21_10,2022-12-21_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 spamscore=0 lowpriorityscore=0 bulkscore=0 priorityscore=1501 adultscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 phishscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2212210144 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add support for the newly added 'synced_poweroff' genpd flag. This allows some clients (like adreno gpu driver) to request gdsc driver to ensure a votable gdsc (like gpucc cx gdsc) has collapsed at hardware. Signed-off-by: Akhil P Oommen --- (no changes since v3) Changes in v3: - Rename the var 'force_sync' to 'wait (Stephen) drivers/clk/qcom/gdsc.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/clk/qcom/gdsc.c b/drivers/clk/qcom/gdsc.c index 9e4d6ce891aa..5358e28122ab 100644 --- a/drivers/clk/qcom/gdsc.c +++ b/drivers/clk/qcom/gdsc.c @@ -136,7 +136,8 @@ static int gdsc_update_collapse_bit(struct gdsc *sc, bool val) return 0; } -static int gdsc_toggle_logic(struct gdsc *sc, enum gdsc_status status) +static int gdsc_toggle_logic(struct gdsc *sc, enum gdsc_status status, + bool wait) { int ret; @@ -149,7 +150,7 @@ static int gdsc_toggle_logic(struct gdsc *sc, enum gdsc_status status) ret = gdsc_update_collapse_bit(sc, status == GDSC_OFF); /* If disabling votable gdscs, don't poll on status */ - if ((sc->flags & VOTABLE) && status == GDSC_OFF) { + if ((sc->flags & VOTABLE) && status == GDSC_OFF && !wait) { /* * Add a short delay here to ensure that an enable * right after it was disabled does not put it in an @@ -275,7 +276,7 @@ static int gdsc_enable(struct generic_pm_domain *domain) gdsc_deassert_clamp_io(sc); } - ret = gdsc_toggle_logic(sc, GDSC_ON); + ret = gdsc_toggle_logic(sc, GDSC_ON, false); if (ret) return ret; @@ -352,7 +353,7 @@ static int gdsc_disable(struct generic_pm_domain *domain) if (sc->pwrsts == PWRSTS_RET_ON) return 0; - ret = gdsc_toggle_logic(sc, GDSC_OFF); + ret = gdsc_toggle_logic(sc, GDSC_OFF, domain->synced_poweroff); if (ret) return ret; @@ -392,7 +393,7 @@ static int gdsc_init(struct gdsc *sc) /* Force gdsc ON if only ON state is supported */ if (sc->pwrsts == PWRSTS_ON) { - ret = gdsc_toggle_logic(sc, GDSC_ON); + ret = gdsc_toggle_logic(sc, GDSC_ON, false); if (ret) return ret; }