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[88.156.142.67]) by smtp.gmail.com with ESMTPSA id v16-20020ac25b10000000b004acff58a951sm29209lfn.133.2022.12.12.08.35.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Dec 2022 08:35:45 -0800 (PST) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski Cc: Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 07/12] ARM: dts: qcom: reverse compatibles to match bindings Date: Mon, 12 Dec 2022 17:35:27 +0100 Message-Id: <20221212163532.142533-7-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221212163532.142533-1-krzysztof.kozlowski@linaro.org> References: <20221212163532.142533-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The most specific compatible should be upfront. Signed-off-by: Krzysztof Kozlowski --- arch/arm/boot/dts/qcom-apq8064.dtsi | 4 ++-- arch/arm/boot/dts/qcom-ipq4019.dtsi | 2 +- arch/arm/boot/dts/qcom-ipq8064.dtsi | 4 ++-- arch/arm/boot/dts/qcom-msm8960.dtsi | 4 ++-- 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index 0da9623ea084..79575d6b3a81 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -375,8 +375,8 @@ intc: interrupt-controller@2000000 { }; timer@200a000 { - compatible = "qcom,kpss-timer", - "qcom,kpss-wdt-apq8064", "qcom,msm-timer"; + compatible = "qcom,kpss-wdt-apq8064", "qcom,kpss-timer", + "qcom,msm-timer"; interrupts = <1 1 0x301>, <1 2 0x301>, <1 3 0x301>; diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index acb08dcf9442..a73c3a17b6a4 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -400,7 +400,7 @@ blsp1_uart2: serial@78b0000 { }; watchdog: watchdog@b017000 { - compatible = "qcom,kpss-wdt", "qcom,kpss-wdt-ipq4019"; + compatible = "qcom,kpss-wdt-ipq4019", "qcom,kpss-wdt"; reg = <0xb017000 0x40>; clocks = <&sleep_clk>; timeout-sec = <10>; diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 7e784b0995da..9daafe9de02a 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -549,8 +549,8 @@ intc: interrupt-controller@2000000 { }; timer@200a000 { - compatible = "qcom,kpss-timer", - "qcom,kpss-wdt-ipq8064", "qcom,msm-timer"; + compatible = "qcom,kpss-wdt-ipq8064", "qcom,kpss-timer", + "qcom,msm-timer"; interrupts = , , , ;