Message ID | 20221212100232.138519-3-krzysztof.kozlowski@linaro.org |
---|---|
State | Accepted |
Commit | 524dfd2ddbd74ed5b4cbb3e002984cf95878c827 |
Headers | show |
Series | [v2,1/6] arm64: dts: qcom: sc7180: order top-level nodes alphabetically | expand |
On 12 December 2022 13:02:29 GMT+03:00, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: >The SoC node is a simple-bus and its schema expect to have nodes only >with unit addresses: > > sc7180-trogdor-lazor-r3.dtb: soc@0: opp-table-qspi: {'compatible': ['operating-points-v2'], 'phandle': [[186]], 'opp-75000000': > ... 'required-opps': [[47]]}} should not be valid under {'type': 'object'} > >Move to top-level OPP tables: > - QUP which is shared between multiple nodes, > - QSPI which cannot be placed in its node due to address/size cells. > >Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> >Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by: Dmitry Baryshkov<dmitry.baryshkov@linaro.org> > >--- > >Changes since v1: >1. Only rebase due to node reorderings. >2. Add Rb tag. >--- > arch/arm64/boot/dts/qcom/sc7180.dtsi | 76 ++++++++++++++-------------- > 1 file changed, 38 insertions(+), 38 deletions(-) > >diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi >index 6d3e86ce2936..eb1e1ea12ff6 100644 >--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi >+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi >@@ -494,6 +494,44 @@ cpu6_opp16: opp-2553600000 { > }; > }; > >+ qspi_opp_table: opp-table-qspi { >+ compatible = "operating-points-v2"; >+ >+ opp-75000000 { >+ opp-hz = /bits/ 64 <75000000>; >+ required-opps = <&rpmhpd_opp_low_svs>; >+ }; >+ >+ opp-150000000 { >+ opp-hz = /bits/ 64 <150000000>; >+ required-opps = <&rpmhpd_opp_svs>; >+ }; >+ >+ opp-300000000 { >+ opp-hz = /bits/ 64 <300000000>; >+ required-opps = <&rpmhpd_opp_nom>; >+ }; >+ }; >+ >+ qup_opp_table: opp-table-qup { >+ compatible = "operating-points-v2"; >+ >+ opp-75000000 { >+ opp-hz = /bits/ 64 <75000000>; >+ required-opps = <&rpmhpd_opp_low_svs>; >+ }; >+ >+ opp-100000000 { >+ opp-hz = /bits/ 64 <100000000>; >+ required-opps = <&rpmhpd_opp_svs>; >+ }; >+ >+ opp-128000000 { >+ opp-hz = /bits/ 64 <128000000>; >+ required-opps = <&rpmhpd_opp_nom>; >+ }; >+ }; >+ > pmu { > compatible = "arm,armv8-pmuv3"; > interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>; >@@ -739,25 +777,6 @@ opp-384000000 { > }; > }; > >- qup_opp_table: opp-table-qup { >- compatible = "operating-points-v2"; >- >- opp-75000000 { >- opp-hz = /bits/ 64 <75000000>; >- required-opps = <&rpmhpd_opp_low_svs>; >- }; >- >- opp-100000000 { >- opp-hz = /bits/ 64 <100000000>; >- required-opps = <&rpmhpd_opp_svs>; >- }; >- >- opp-128000000 { >- opp-hz = /bits/ 64 <128000000>; >- required-opps = <&rpmhpd_opp_nom>; >- }; >- }; >- > qupv3_id_0: geniqup@8c0000 { > compatible = "qcom,geni-se-qup"; > reg = <0 0x008c0000 0 0x6000>; >@@ -2655,25 +2674,6 @@ opp-202000000 { > }; > }; > >- qspi_opp_table: opp-table-qspi { >- compatible = "operating-points-v2"; >- >- opp-75000000 { >- opp-hz = /bits/ 64 <75000000>; >- required-opps = <&rpmhpd_opp_low_svs>; >- }; >- >- opp-150000000 { >- opp-hz = /bits/ 64 <150000000>; >- required-opps = <&rpmhpd_opp_svs>; >- }; >- >- opp-300000000 { >- opp-hz = /bits/ 64 <300000000>; >- required-opps = <&rpmhpd_opp_nom>; >- }; >- }; >- > qspi: spi@88dc000 { > compatible = "qcom,sc7180-qspi", "qcom,qspi-v1"; > reg = <0 0x088dc000 0 0x600>;
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 6d3e86ce2936..eb1e1ea12ff6 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -494,6 +494,44 @@ cpu6_opp16: opp-2553600000 { }; }; + qspi_opp_table: opp-table-qspi { + compatible = "operating-points-v2"; + + opp-75000000 { + opp-hz = /bits/ 64 <75000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-150000000 { + opp-hz = /bits/ 64 <150000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-300000000 { + opp-hz = /bits/ 64 <300000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + + qup_opp_table: opp-table-qup { + compatible = "operating-points-v2"; + + opp-75000000 { + opp-hz = /bits/ 64 <75000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-128000000 { + opp-hz = /bits/ 64 <128000000>; + required-opps = <&rpmhpd_opp_nom>; + }; + }; + pmu { compatible = "arm,armv8-pmuv3"; interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>; @@ -739,25 +777,6 @@ opp-384000000 { }; }; - qup_opp_table: opp-table-qup { - compatible = "operating-points-v2"; - - opp-75000000 { - opp-hz = /bits/ 64 <75000000>; - required-opps = <&rpmhpd_opp_low_svs>; - }; - - opp-100000000 { - opp-hz = /bits/ 64 <100000000>; - required-opps = <&rpmhpd_opp_svs>; - }; - - opp-128000000 { - opp-hz = /bits/ 64 <128000000>; - required-opps = <&rpmhpd_opp_nom>; - }; - }; - qupv3_id_0: geniqup@8c0000 { compatible = "qcom,geni-se-qup"; reg = <0 0x008c0000 0 0x6000>; @@ -2655,25 +2674,6 @@ opp-202000000 { }; }; - qspi_opp_table: opp-table-qspi { - compatible = "operating-points-v2"; - - opp-75000000 { - opp-hz = /bits/ 64 <75000000>; - required-opps = <&rpmhpd_opp_low_svs>; - }; - - opp-150000000 { - opp-hz = /bits/ 64 <150000000>; - required-opps = <&rpmhpd_opp_svs>; - }; - - opp-300000000 { - opp-hz = /bits/ 64 <300000000>; - required-opps = <&rpmhpd_opp_nom>; - }; - }; - qspi: spi@88dc000 { compatible = "qcom,sc7180-qspi", "qcom,qspi-v1"; reg = <0 0x088dc000 0 0x600>;