@@ -553,6 +553,8 @@ struct qmp_phy_cfg {
const struct qmp_phy_cfg_tbls tbls;
/* Additional sequence for HS Series B */
const struct qmp_phy_cfg_tbls tbls_hs_b;
+ /* Additional sequence for HS G4 */
+ const struct qmp_phy_cfg_tbls tbls_hs_g4;
/* clock ids to be requested */
const char * const *clk_list;
@@ -587,6 +589,7 @@ struct qmp_phy_cfg {
* @pcs_misc: iomapped memory space for lane's pcs_misc
* @qmp: QMP phy to which this lane belongs
* @mode: PHY mode configured by the UFS driver
+ * @submode: PHY submode configured by the UFS driver
*/
struct qmp_phy {
struct phy *phy;
@@ -600,6 +603,7 @@ struct qmp_phy {
void __iomem *pcs_misc;
struct qcom_qmp *qmp;
u32 mode;
+ u32 submode;
};
/**
@@ -894,7 +898,11 @@ static void qmp_ufs_init_registers(struct qmp_phy *qphy, const struct qmp_phy_cf
if (qphy->mode == PHY_MODE_UFS_HS_B)
qmp_ufs_serdes_init(qphy, &cfg->tbls_hs_b);
qmp_ufs_lanes_init(qphy, &cfg->tbls);
+ if (qphy->submode == UFS_HS_G4)
+ qmp_ufs_lanes_init(qphy, &cfg->tbls_hs_g4);
qmp_ufs_pcs_init(qphy, &cfg->tbls);
+ if (qphy->submode == UFS_HS_G4)
+ qmp_ufs_pcs_init(qphy, &cfg->tbls_hs_g4);
}
static int qmp_ufs_com_init(struct qmp_phy *qphy)
@@ -1086,6 +1094,7 @@ static int qmp_ufs_set_mode(struct phy *phy, enum phy_mode mode, int submode)
struct qmp_phy *qphy = phy_get_drvdata(phy);
qphy->mode = mode;
+ qphy->submode = submode;
return 0;
}