From patchwork Tue Nov 15 15:27:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 624886 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B8981C43219 for ; Tue, 15 Nov 2022 15:27:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237837AbiKOP1o (ORCPT ); Tue, 15 Nov 2022 10:27:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57802 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237288AbiKOP1n (ORCPT ); Tue, 15 Nov 2022 10:27:43 -0500 Received: from mail-ej1-x62a.google.com (mail-ej1-x62a.google.com [IPv6:2a00:1450:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 011642D76B for ; Tue, 15 Nov 2022 07:27:42 -0800 (PST) Received: by mail-ej1-x62a.google.com with SMTP id i10so28239989ejg.6 for ; Tue, 15 Nov 2022 07:27:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=IypuJ/Pof2USoK7b4/Atk2DRjHrF23U2plR6w47C7ao=; b=ito5/jloRWFJ99jHqzlUSB4dBZpMQRiX+Vmb2DRhO1mWYaBAQEtz+7NntJX+Jan9PH Atnwdz311XrxObo9JVDE+jxVAMcBgJcl1wmVk2ob3hGKKWOIEU17e4FaVriDc3CLmREn ta/KKE/wRx5PuWIqFfrU1IFuFxHwcnBj5QOmRZXuqmNb9ag6pu23wkvs3zGqVf2/8I2d SEyqFklKn0qZDPmmVta7XKisPbu4bcOJK7VKRDBZTxso1Krtk//SocgRlFAjH+ISWxKM t9XH5TB0bvWdQqzSXMBBql44J1oUnVZjuVilEsk2ce0GmK7wYFQtYT/ire9Oq97kOk2m +rcw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IypuJ/Pof2USoK7b4/Atk2DRjHrF23U2plR6w47C7ao=; b=PqULuevXFCQq5qdATea2AgnFBqKeeAOgkdy7qQg1/H/MenveGrgKJtpa9UrYG/D67w bgQIBSmHVc56C2e8QfjrWTsrE+G885wnGVpJL9peAASravK19v0bC6tzrgVHl5TCvlYH FblpgMK+wGx5oSQkzBGCC4NFgD49lv9Bpv9cGwjjEGHNFZblv8vCW6DX240D2xfkhNFG JrPhGOH0IUQr+zEKMd/o87NTcB8AbbDNjDdClA33hPx24ggTeLXKL8zEX5C4BzYeIymJ ytflnP88IxGxaTeKEUuRn9+kISd4RGKX1upl5AOIcTEYXiFfjbWNPGSvBJwslQCEZUa2 YC+A== X-Gm-Message-State: ANoB5pmXMZY7abyP9uydd8UitZe1Jzlp6SlRq2Lzn40j1vaWBEivzPL2 lXIdSYqzo77Kj12GKMrRYCR79f9pQyyB6LOR X-Google-Smtp-Source: AA0mqf50V2PfNgzViLP2mKi1jL47BCBMB63T0Ng5UlgIw+DgCsgLNzx1P9I0TusUJoS3nHavcUpnFg== X-Received: by 2002:a17:906:1441:b0:7ad:b97e:283a with SMTP id q1-20020a170906144100b007adb97e283amr13913029ejc.567.1668526060270; Tue, 15 Nov 2022 07:27:40 -0800 (PST) Received: from localhost.localdomain ([194.29.137.22]) by smtp.gmail.com with ESMTPSA id ku21-20020a170907789500b007ae1ab8f887sm5750679ejc.14.2022.11.15.07.27.38 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 15 Nov 2022 07:27:39 -0800 (PST) From: Konrad Dybcio To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: patches@linaro.org, Konrad Dybcio , Dmitry Baryshkov , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/9] arm64: dts: qcom: pmk8350: Allow specifying arbitrary SID Date: Tue, 15 Nov 2022 16:27:20 +0100 Message-Id: <20221115152727.9736-3-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.32.0 (Apple Git-132) In-Reply-To: <20221115152727.9736-1-konrad.dybcio@linaro.org> References: <20221115152727.9736-1-konrad.dybcio@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org PMK8350 is shipped on SID6 with some SoCs, for example with SM6375. Add some preprocessor logic to allow changing the SID in cases like this. While I am not in favour of adding #if's into the device tree, this is the least messy way to handle this. If one isn't specified, it will default to 0 (as it has been previously). Suggested-by: Dmitry Baryshkov Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/pmk8350.dtsi | 19 ++++++++++++------- 1 file changed, 12 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/pmk8350.dtsi b/arch/arm64/boot/dts/qcom/pmk8350.dtsi index a7ec9d11946d..2730d97ab213 100644 --- a/arch/arm64/boot/dts/qcom/pmk8350.dtsi +++ b/arch/arm64/boot/dts/qcom/pmk8350.dtsi @@ -8,10 +8,15 @@ #include #include +/* (Sadly) this PMIC can be configured to be at different SIDs */ +#ifndef PMK8350_SID + #define PMK8350_SID 0 +#endif + &spmi_bus { - pmk8350: pmic@0 { + pmk8350: pmic@PMK8350_SID { compatible = "qcom,pmk8350", "qcom,spmi-pmic"; - reg = <0x0 SPMI_USID>; + reg = ; #address-cells = <1>; #size-cells = <0>; @@ -21,14 +26,14 @@ pmk8350_pon: pon@1300 { pon_pwrkey: pwrkey { compatible = "qcom,pmk8350-pwrkey"; - interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>; + interrupts = ; linux,code = ; status = "disabled"; }; pon_resin: resin { compatible = "qcom,pmk8350-resin"; - interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>; + interrupts = ; status = "disabled"; }; }; @@ -38,14 +43,14 @@ pmk8350_vadc: adc@3100 { reg = <0x3100>; #address-cells = <1>; #size-cells = <0>; - interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + interrupts = ; #io-channel-cells = <1>; }; pmk8350_adc_tm: adc-tm@3400 { compatible = "qcom,adc-tm7"; reg = <0x3400>; - interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>; + interrupts = ; #address-cells = <1>; #size-cells = <0>; #thermal-sensor-cells = <1>; @@ -56,7 +61,7 @@ pmk8350_rtc: rtc@6100 { compatible = "qcom,pmk8350-rtc"; reg = <0x6100>, <0x6200>; reg-names = "rtc", "alarm"; - interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>; + interrupts = ; status = "disabled"; };