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[1/2] dt-bindings: soc: qcom: Add bindings for Qualcomm Ramp Controller

Message ID 20221104133506.131316-2-angelogioacchino.delregno@collabora.com
State Superseded
Headers show
Series [1/2] dt-bindings: soc: qcom: Add bindings for Qualcomm Ramp Controller | expand

Commit Message

AngeloGioacchino Del Regno Nov. 4, 2022, 1:35 p.m. UTC 
Document bindings for the Qualcomm Ramp Controller, found on various
legacy Qualcomm SoCs.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
 .../soc/qcom/qcom,ramp-controller.yaml        | 42 +++++++++++++++++++
 1 file changed, 42 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,ramp-controller.yaml
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Patch

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,ramp-controller.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,ramp-controller.yaml
new file mode 100644
index 000000000000..95ce48cfca4e
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,ramp-controller.yaml
@@ -0,0 +1,42 @@ 
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/soc/qcom/qcom,ramp-controller.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Qualcomm Ramp Controller
+
+maintainers:
+  - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
+
+description:
+  The Ramp Controller is used to program the sequence ID for pulse
+  swallowing, enable sequences and linking Sequence IDs (SIDs) for
+  the CPU cores on some Qualcomm SoCs.
+
+properties:
+  compatible:
+    items:
+      enum:
+        - qcom,msm8976-ramp-controller
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    soc {
+        #address-cells = <2>;
+        #size-cells = <2>;
+
+        power-controller@b014000 {
+            compatible = "qcom,msm8976-ramp-controller";
+            reg = <0x0b014000 0x68>;
+        };
+    };