| Message ID | 20221010114417.29859-2-krzysztof.kozlowski@linaro.org |
|---|---|
| State | Accepted |
| Commit | 9905370560d9c29adc15f4937c5a0c0dac05f0b4 |
| Headers | show |
| Series | [v2,1/6] arm64: dts: qcom: sdm630: fix UART1 pin bias | expand |
On 10/10/2022 13:44, Krzysztof Kozlowski wrote: > The pin configuration (done with generic pin controller helpers and > as expressed by bindings) requires children nodes with either: > 1. "pins" property and the actual configuration, > 2. another set of nodes with above point. > > The qup_spi2_default pin configuration uses alreaady the second method > with a "pinmux" child, so configure drive-strength similarly in > "pinconf". Otherwise the PIN drive strength would not be applied. > > Fixes: 8d23a0040475 ("arm64: dts: qcom: db845c: add Low speed expansion i2c and spi nodes") > Cc: <stable@vger.kernel.org> > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > --- > > Not tested on hardware. > > Changes since v1: > 1. Put it under pinconf instead of pinmux, as suggested by Doug. > --- <snip> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Hi, On Mon, Oct 10, 2022 at 4:46 AM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > The pin configuration (done with generic pin controller helpers and > as expressed by bindings) requires children nodes with either: > 1. "pins" property and the actual configuration, > 2. another set of nodes with above point. > > The qup_spi2_default pin configuration uses alreaady the second method > with a "pinmux" child, so configure drive-strength similarly in > "pinconf". Otherwise the PIN drive strength would not be applied. > > Fixes: 8d23a0040475 ("arm64: dts: qcom: db845c: add Low speed expansion i2c and spi nodes") > Cc: <stable@vger.kernel.org> > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > --- > > Not tested on hardware. > > Changes since v1: > 1. Put it under pinconf instead of pinmux, as suggested by Doug. I notice that there are other two patches in the series that put the configuration info under the mux node. ;-) They are with SoCs / boards that I wasn't really involved in and so I won't do anything to block them from landing but, as per my replies to v1 it's not my favorite... In any case, this patch here looks great to me. Thanks! Looking forward to seeing these converted over to the scheme that your sc7180 patches used. Reviewed-by: Douglas Anderson <dianders@chromium.org>
diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts index 132417e2d11e..a3e15dedd60c 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts @@ -1123,7 +1123,10 @@ &wifi { /* PINCTRL - additions to nodes defined in sdm845.dtsi */ &qup_spi2_default { - drive-strength = <16>; + pinconf { + pins = "gpio27", "gpio28", "gpio29", "gpio30"; + drive-strength = <16>; + }; }; &qup_uart3_default{
The pin configuration (done with generic pin controller helpers and as expressed by bindings) requires children nodes with either: 1. "pins" property and the actual configuration, 2. another set of nodes with above point. The qup_spi2_default pin configuration uses alreaady the second method with a "pinmux" child, so configure drive-strength similarly in "pinconf". Otherwise the PIN drive strength would not be applied. Fixes: 8d23a0040475 ("arm64: dts: qcom: db845c: add Low speed expansion i2c and spi nodes") Cc: <stable@vger.kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- Not tested on hardware. Changes since v1: 1. Put it under pinconf instead of pinmux, as suggested by Doug. --- arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)