From patchwork Sat Oct 1 03:06:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Melody Olvera X-Patchwork-Id: 611806 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 64B13C433F5 for ; Sat, 1 Oct 2022 03:09:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232999AbiJADJc (ORCPT ); Fri, 30 Sep 2022 23:09:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232693AbiJADHv (ORCPT ); Fri, 30 Sep 2022 23:07:51 -0400 Received: from alexa-out-sd-02.qualcomm.com (alexa-out-sd-02.qualcomm.com [199.106.114.39]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BD49F3120B; Fri, 30 Sep 2022 20:07:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1664593642; x=1696129642; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=HfqxfIIh0PJaRBXnhpEKQJDvwicLwQxNHHW2gL59Xko=; b=YLq/isvVo5dy87yTuDhYukSdvQcDRcmCgXAk9MOWKy71S0LUI87P7QDe rW/xg8d/50la8h5qhHPSGwnLXfBvxWFi1XIeGigByccB0xqCFR13wEG2l u/am2A7L1ZAm+9KncjchFBzxPzHoFp5PZC41XdddDzeOkxp72V7HRtsIj 0=; Received: from unknown (HELO ironmsg-SD-alpha.qualcomm.com) ([10.53.140.30]) by alexa-out-sd-02.qualcomm.com with ESMTP; 30 Sep 2022 20:07:18 -0700 X-QCInternal: smtphost Received: from nasanex01b.na.qualcomm.com ([10.46.141.250]) by ironmsg-SD-alpha.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2022 20:07:18 -0700 Received: from hu-molvera-sd.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Fri, 30 Sep 2022 20:07:16 -0700 From: Melody Olvera To: Andy Gross , Bjorn Andersson , Rob Herring , "Krzysztof Kozlowski" CC: , , , Melody Olvera Subject: [PATCH 16/19] arm64: dts: qcom: qdru1000: Add gpi_dma nodes Date: Fri, 30 Sep 2022 20:06:53 -0700 Message-ID: <20221001030656.29365-17-quic_molvera@quicinc.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221001030656.29365-1-quic_molvera@quicinc.com> References: <20221001030656.29365-1-quic_molvera@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org GPI DMA is used tof DMA operations for QUP devices, so add the two gpi_dma instances on the QDU1000 and QRU1000 SoCs. Signed-off-by: Melody Olvera --- arch/arm64/boot/dts/qcom/qdru1000.dtsi | 45 ++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qdru1000.dtsi b/arch/arm64/boot/dts/qcom/qdru1000.dtsi index 5d3932ad67a1..c105bc15995b 100644 --- a/arch/arm64/boot/dts/qcom/qdru1000.dtsi +++ b/arch/arm64/boot/dts/qcom/qdru1000.dtsi @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -225,6 +226,50 @@ gcc: clock-controller@80000 { clock-names = "bi_tcxo", "sleep_clk"; }; + gpi_dma0: dma-controller@900000 { + compatible = "qcom,qdu1000-gpi-dma", "qcom,qru1000-gpi-dma"; + #dma-cells = <5>; + reg = <0x0 0x900000 0x0 0x60000>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + ; + dma-channels = <12>; + dma-channel-mask = <0x3f>; + iommus = <&apps_smmu 0xf6 0x0>; + status = "ok"; + }; + + gpi_dma1: dma-controller@a00000 { + compatible = "qcom,qdu1000-gpi-dma", "qcom,qru1000-gpi-dma"; + #dma-cells = <5>; + reg = <0x0 0xa00000 0x0 0x60000>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + ; + dma-channels = <12>; + dma-channel-mask = <0x3f>; + iommus = <&apps_smmu 0x116 0x0>; + status = "ok"; + }; + qupv3_id_0: geniqup@9c0000 { compatible = "qcom,geni-se-qup"; reg = <0x0 0x9c0000 0x0 0x2000>;