Message ID | 20220930212052.894834-2-dmitry.baryshkov@linaro.org |
---|---|
State | Accepted |
Commit | 0d6e44e257ec53b41c2969130e0eb97b0a41b1d6 |
Headers | show |
Series | [1/2] dt-bindings: soc: qcom: YAML-ify SSBI bindings | expand |
On 30/09/2022 23:20, Dmitry Baryshkov wrote: > On MDM9615 the PMICs are connected using SSBI devices, which do not have > any addressing scheme. Drop the unused unit ids from PMIC device nodes. > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > arch/arm/boot/dts/qcom-mdm9615.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi > index b47c86412de2..bb17a57a2b90 100644 > --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi > +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi > @@ -283,7 +283,7 @@ qcom,ssbi@500000 { > reg = <0x500000 0x1000>; > qcom,controller-type = "pmic-arbiter"; > > - pmicintc: pmic@0 { > + pmicintc: pmic { I think several other platforms, also with PMIC over SSBI, have the same problem. If that's correct, can you fix them in the same patchset? Best regards, Krzysztof
On Sat, 1 Oct 2022 at 12:40, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 30/09/2022 23:20, Dmitry Baryshkov wrote: > > On MDM9615 the PMICs are connected using SSBI devices, which do not have > > any addressing scheme. Drop the unused unit ids from PMIC device nodes. > > > > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > > --- > > arch/arm/boot/dts/qcom-mdm9615.dtsi | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi > > index b47c86412de2..bb17a57a2b90 100644 > > --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi > > +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi > > @@ -283,7 +283,7 @@ qcom,ssbi@500000 { > > reg = <0x500000 0x1000>; > > qcom,controller-type = "pmic-arbiter"; > > > > - pmicintc: pmic@0 { > > + pmicintc: pmic { > > I think several other platforms, also with PMIC over SSBI, have the same > problem. If that's correct, can you fix them in the same patchset? It was a part of my previous patchset, but yeah. Let's get it done in this one.
On 02/10/2022 15:20, Dmitry Baryshkov wrote: >>> diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi >>> index b47c86412de2..bb17a57a2b90 100644 >>> --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi >>> +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi >>> @@ -283,7 +283,7 @@ qcom,ssbi@500000 { >>> reg = <0x500000 0x1000>; >>> qcom,controller-type = "pmic-arbiter"; >>> >>> - pmicintc: pmic@0 { >>> + pmicintc: pmic { >> >> I think several other platforms, also with PMIC over SSBI, have the same >> problem. If that's correct, can you fix them in the same patchset? > > It was a part of my previous patchset, but yeah. Let's get it done in this one. > Ah, if you fix them in separate patchset, it's also ok. Best regards, Krzysztof
diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi index b47c86412de2..bb17a57a2b90 100644 --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi @@ -283,7 +283,7 @@ qcom,ssbi@500000 { reg = <0x500000 0x1000>; qcom,controller-type = "pmic-arbiter"; - pmicintc: pmic@0 { + pmicintc: pmic { compatible = "qcom,pm8018", "qcom,pm8921"; interrupts = <GIC_PPI 226 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <2>;
On MDM9615 the PMICs are connected using SSBI devices, which do not have any addressing scheme. Drop the unused unit ids from PMIC device nodes. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- arch/arm/boot/dts/qcom-mdm9615.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)