Message ID | 20220817131415.714340-12-krzysztof.kozlowski@linaro.org |
---|---|
State | Superseded |
Headers | show |
Series | ARM/hwlock: qcom: switch TCSR mutex to MMIO | expand |
diff --git a/arch/arm/boot/dts/qcom-apq8084.dtsi b/arch/arm/boot/dts/qcom-apq8084.dtsi index 72f9255855a1..5e07255fe5ea 100644 --- a/arch/arm/boot/dts/qcom-apq8084.dtsi +++ b/arch/arm/boot/dts/qcom-apq8084.dtsi @@ -383,14 +383,9 @@ gcc: clock-controller@fc400000 { reg = <0xfc400000 0x4000>; }; - tcsr_mutex_regs: syscon@fd484000 { - compatible = "syscon"; - reg = <0xfd484000 0x2000>; - }; - - tcsr_mutex: hwlock { - compatible = "qcom,tcsr-mutex"; - syscon = <&tcsr_mutex_regs 0 0x80>; + tcsr_mutex: hwlock@fd484000 { + compatible = "qcom,apq8084-tcsr-mutex", "qcom,tcsr-mutex"; + reg = <0xfd484000 0x1000>; #hwlock-cells = <1>; };
The TCSR mutex bindings allow device to be described only with address space (so it uses MMIO, not syscon regmap). This seems reasonable as TCSR mutex is actually a dedicated IO address space and it also fixes DT schema checks: qcom-apq8084-mtp.dtb: hwlock: 'reg' is a required property qcom-apq8084-mtp.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- arch/arm/boot/dts/qcom-apq8084.dtsi | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-)