| Message ID | 20220706145222.1565238-2-dmitry.baryshkov@linaro.org |
|---|---|
| State | Accepted |
| Commit | a5e96a572d59ce45da51a27310f8a376bc69a868 |
| Headers | show |
| Series | dt-bindings: display/msm: schema fixes for gpu, gmu and mdp4 | expand |
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml index 3397bc31d087..346aabdccf7b 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml @@ -58,7 +58,8 @@ properties: - const: ocmem iommus: - maxItems: 1 + minItems: 1 + maxItems: 64 sram: $ref: /schemas/types.yaml#/definitions/phandle-array
Different platforms require different amounts of IOMMUs. The APQ8064 uses 64 IOMMU instances for GPU, adjust the schema accordingly. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- Documentation/devicetree/bindings/display/msm/gpu.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)