From patchwork Tue Jul 5 09:42:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 587854 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A58C9CCA481 for ; Tue, 5 Jul 2022 09:49:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231787AbiGEJt0 (ORCPT ); Tue, 5 Jul 2022 05:49:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38736 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231465AbiGEJtJ (ORCPT ); Tue, 5 Jul 2022 05:49:09 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8F82B11460; Tue, 5 Jul 2022 02:49:06 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id DF6FDB8171A; Tue, 5 Jul 2022 09:49:04 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5BD84C341E5; Tue, 5 Jul 2022 09:49:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1657014542; bh=NMxyyY5EOHfjt1+lyrJz2Sw7j5+cVRS+u/94icaLdxk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fc0zByHa8OBPw8ZPM3aEkjaODp1ACGATqXRzqG/DX8fu/t/gpsp5+LgQcupn/nghK 6fql2kkMWoYp/Q+FjrsmvGCrW851LtsziS3NxWDxcMMHOVt2T53ADzXzb1qj6bbcTh WFsXLP2eCaiAsWpSN2Pl7vnCbvmMR6OaWVYf40PNcXOMziit732qGIge7lL7vcInLP ymtsIWrGsNDlIV6SbXTj6CI9MXj2eQyWvulfBZ4+Hs4S0g/bCjFUEKGbCyE063Xqx8 KHlPl/4yLGe47B5u1KCzK0id67EmDXgHVbr3Zo2/HTScldI6nbuylM4IkGxjAQGMFV Rdi4RfmRMEk7g== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1o8fB1-0004XC-7O; Tue, 05 Jul 2022 11:49:03 +0200 From: Johan Hovold To: Vinod Koul , Rob Herring , Krzysztof Kozlowski Cc: Andy Gross , Bjorn Andersson , Kishon Vijay Abraham I , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 08/43] dt-bindings: phy: qcom,msm8996-qmp-pcie: add missing child node schema Date: Tue, 5 Jul 2022 11:42:04 +0200 Message-Id: <20220705094239.17174-9-johan+linaro@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220705094239.17174-1-johan+linaro@kernel.org> References: <20220705094239.17174-1-johan+linaro@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the missing the description of the PHY-provider child nodes which were ignored when converting to DT schema. Also fix up the description that claimed that one child node per lane (rather than PHY) was required. Fixes: ccf51c1cedfd ("dt-bindings: phy: qcom,qmp: Convert QMP PHY bindings to yaml") Signed-off-by: Johan Hovold --- .../phy/qcom,msm8996-qmp-pcie-phy.yaml | 51 ++++++++++++++++++- 1 file changed, 49 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml index b73bf5c06358..8aadb25686b2 100644 --- a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-pcie-phy.yaml @@ -66,8 +66,55 @@ patternProperties: "^phy@[0-9a-f]+$": type: object description: - Each device node of QMP PHY is required to have as many child nodes as - the number of lanes the PHY has. + One child node per PHY provided by this block. + properties: + reg: + items: + - description: TX + - description: RX + - description: PCS + + clocks: + items: + - description: PIPE clock + + clock-names: + items: + - enum: + - pipe0 + - pipe1 + - pipe2 + + resets: + items: + - description: PHY (lane) reset + + reset-names: + items: + - enum: + - lane0 + - lane1 + - lane2 + + "#clock-cells": + const: 0 + + clock-output-names: true + + "#phy-cells": + const: 0 + + required: + - reg + - clocks + - clock-names + - resets + - reset-names + - "#clock-cells" + - clock-output-names + - "#phy-cells" + + additionalProperties: false required: - compatible