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[88.112.131.206]) by smtp.gmail.com with ESMTPSA id e18-20020ac25472000000b0047fa941066bsm3466694lfn.96.2022.06.30.23.27.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Jun 2022 23:27:28 -0700 (PDT) From: Vladimir Zapolskiy To: Bjorn Andersson Cc: Andy Gross , Stephen Boyd , Michael Turquette , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, Vinod Koul Subject: [PATCH v10 4/7] clk: qcom: clk-alpha-pll: limit exported symbols to GPL licensed code Date: Fri, 1 Jul 2022 09:27:20 +0300 Message-Id: <20220701062720.2757874-1-vladimir.zapolskiy@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220701062622.2757831-1-vladimir.zapolskiy@linaro.org> References: <20220701062622.2757831-1-vladimir.zapolskiy@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Unify all exported PLL clock configuration functions and data structures as GPL symbols. Reviewed-by: Bjorn Andersson Reviewed-by: Stephen Boyd Reviewed-by: Vinod Koul Signed-off-by: Vladimir Zapolskiy --- Changes from v9 to v10: * added reviewed tag by Vinod. Changes from v8 to v9: * none. Changes from v7 to v8: * added Stephen's tag. Changes from v3 to v7: * none. Changes from v2 to v3: * added Bjorn's reviewed-by tag Changes from v1 to v2: * none. drivers/clk/qcom/clk-alpha-pll.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index 288692f0ea39..47879ee5a677 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -1823,7 +1823,7 @@ const struct clk_ops clk_alpha_pll_lucid_5lpe_ops = { .round_rate = clk_alpha_pll_round_rate, .set_rate = alpha_pll_lucid_5lpe_set_rate, }; -EXPORT_SYMBOL(clk_alpha_pll_lucid_5lpe_ops); +EXPORT_SYMBOL_GPL(clk_alpha_pll_lucid_5lpe_ops); const struct clk_ops clk_alpha_pll_fixed_lucid_5lpe_ops = { .enable = alpha_pll_lucid_5lpe_enable, @@ -1832,14 +1832,14 @@ const struct clk_ops clk_alpha_pll_fixed_lucid_5lpe_ops = { .recalc_rate = clk_trion_pll_recalc_rate, .round_rate = clk_alpha_pll_round_rate, }; -EXPORT_SYMBOL(clk_alpha_pll_fixed_lucid_5lpe_ops); +EXPORT_SYMBOL_GPL(clk_alpha_pll_fixed_lucid_5lpe_ops); const struct clk_ops clk_alpha_pll_postdiv_lucid_5lpe_ops = { .recalc_rate = clk_alpha_pll_postdiv_fabia_recalc_rate, .round_rate = clk_alpha_pll_postdiv_fabia_round_rate, .set_rate = clk_lucid_5lpe_pll_postdiv_set_rate, }; -EXPORT_SYMBOL(clk_alpha_pll_postdiv_lucid_5lpe_ops); +EXPORT_SYMBOL_GPL(clk_alpha_pll_postdiv_lucid_5lpe_ops); void clk_zonda_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config) @@ -1992,7 +1992,7 @@ const struct clk_ops clk_alpha_pll_zonda_ops = { .round_rate = clk_alpha_pll_round_rate, .set_rate = clk_zonda_pll_set_rate, }; -EXPORT_SYMBOL(clk_alpha_pll_zonda_ops); +EXPORT_SYMBOL_GPL(clk_alpha_pll_zonda_ops); static int alpha_pll_lucid_evo_enable(struct clk_hw *hw) {