From patchwork Sun Aug 29 15:47:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 504084 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DBDE3C25AEE for ; Sun, 29 Aug 2021 15:48:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C010C60F92 for ; Sun, 29 Aug 2021 15:48:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235742AbhH2Ps7 (ORCPT ); Sun, 29 Aug 2021 11:48:59 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53174 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235671AbhH2Ps4 (ORCPT ); Sun, 29 Aug 2021 11:48:56 -0400 Received: from mail-lj1-x231.google.com (mail-lj1-x231.google.com [IPv6:2a00:1450:4864:20::231]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1AE95C061796 for ; Sun, 29 Aug 2021 08:48:04 -0700 (PDT) Received: by mail-lj1-x231.google.com with SMTP id q21so21226343ljj.6 for ; Sun, 29 Aug 2021 08:48:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=eOntGbmHjlIJIEAoFIo+0TbTE6MIwWPZGdnvY8XJV3s=; b=IkUY3h1xG3A+y7RAhDKQu4hw7zVPoB/Y9uMmKSvxKEzYPflze9VXSOnrp2VAR5/fbm 437gJIgWPxHWKFzMeBPOIHNINUS0MDXWCAq5QJLs5Ger4NUKm1DqR/Mnuf0E0v0wkJ0V npCb/h+ck6AV2kSSm/H76uH3L5ExcfV+UvVndR5FJFYVPmpl7JfPAfFFylhjc+qA0KCp CDkVuaUX0aoqEjXMRovLOJeY8NKCd73rrHr4rJwaQDbYFIXuuAoWKG1gL8YNlPyItFKE HlEhMuVXhbJs/Kia12tCb7jJ1+Azoa1VciNfcI/btmYFHWLmRjsmjpDsk+Tqd0f/KjNd loXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=eOntGbmHjlIJIEAoFIo+0TbTE6MIwWPZGdnvY8XJV3s=; b=OWGNPf1YwdFxPwldLTsWobFaSTAVQ/xzAKQH4NnhvUtA7T2h7KtkEXRAQPq31EcjgU dsOsUSR7h7fyyMvjES3HCZ2XboTGhqhQZvIRKz5FEs1laRFIyewNv399LUse22s621kM 8ShjyuxGVX7Zf0d+Xk/FUhsv8NErEjLJLY9rIHgMCQqEWKoN9S0W/ZLevYEEQHSl3S26 CZURFie8NedkfYV1XDZ8GyIUyfW1BRodUw0wCpTTdt5CphPTkRYGVJptjJ/UvzKq8jWD d+42FE0a6oL8TQNwoyeZ8yu+CxuLMuk+5yOHBM38bwOd2LgcuMrXPFCzW4RDHjv0ge4G hGPw== X-Gm-Message-State: AOAM532zq/xjOOZHILJTR9FrcUgNOAABqHCsdCdCZxUoDJE96AUCO53L DyI8wLO1QuF0pMNbTFTMFEcUwA== X-Google-Smtp-Source: ABdhPJyhkUCYxZEQqZAX55eEdpuUyApHu9wUx4tQwqOUVevrmTzuUQ2qY9cHfqxerTmtjkH5Cp3MTg== X-Received: by 2002:a2e:b5dc:: with SMTP id g28mr16900490ljn.96.1630252082420; Sun, 29 Aug 2021 08:48:02 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id y5sm1481243ljd.38.2021.08.29.08.48.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 29 Aug 2021 08:48:02 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Rob Herring , Stephen Boyd , Taniya Das , Jonathan Marek , Michael Turquette Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Bryan O'Donoghue , Mark Brown , Ulf Hansson , linux-kernel@vger.kernel.org Subject: [PATCH v7 4/8] clk: qcom: videocc-sm8250: use runtime PM for the clock controller Date: Sun, 29 Aug 2021 18:47:53 +0300 Message-Id: <20210829154757.784699-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210829154757.784699-1-dmitry.baryshkov@linaro.org> References: <20210829154757.784699-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On sm8250 dispcc and videocc registers are powered up by the MMCX power domain. Use runtime PM calls to make sure that required power domain is powered on while we access clock controller's registers. Signed-off-by: Dmitry Baryshkov Reviewed-by: Bjorn Andersson --- drivers/clk/qcom/videocc-sm8250.c | 27 +++++++++++++++++++++++++-- 1 file changed, 25 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/videocc-sm8250.c b/drivers/clk/qcom/videocc-sm8250.c index 7b435a1c2c4b..8617454e4a77 100644 --- a/drivers/clk/qcom/videocc-sm8250.c +++ b/drivers/clk/qcom/videocc-sm8250.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include @@ -364,13 +365,31 @@ static const struct of_device_id video_cc_sm8250_match_table[] = { }; MODULE_DEVICE_TABLE(of, video_cc_sm8250_match_table); +static void video_cc_sm8250_pm_runtime_disable(void *data) +{ + pm_runtime_disable(data); +} + static int video_cc_sm8250_probe(struct platform_device *pdev) { struct regmap *regmap; + int ret; + + pm_runtime_enable(&pdev->dev); + + ret = devm_add_action_or_reset(&pdev->dev, video_cc_sm8250_pm_runtime_disable, &pdev->dev); + if (ret) + return ret; + + ret = pm_runtime_resume_and_get(&pdev->dev); + if (ret) + return ret; regmap = qcom_cc_map(pdev, &video_cc_sm8250_desc); - if (IS_ERR(regmap)) + if (IS_ERR(regmap)) { + pm_runtime_put(&pdev->dev); return PTR_ERR(regmap); + } clk_lucid_pll_configure(&video_pll0, regmap, &video_pll0_config); clk_lucid_pll_configure(&video_pll1, regmap, &video_pll1_config); @@ -379,7 +398,11 @@ static int video_cc_sm8250_probe(struct platform_device *pdev) regmap_update_bits(regmap, 0xe58, BIT(0), BIT(0)); regmap_update_bits(regmap, 0xeec, BIT(0), BIT(0)); - return qcom_cc_really_probe(pdev, &video_cc_sm8250_desc, regmap); + ret = qcom_cc_really_probe(pdev, &video_cc_sm8250_desc, regmap); + + pm_runtime_put(&pdev->dev); + + return ret; } static struct platform_driver video_cc_sm8250_driver = {