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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id v18sm15466618wrf.41.2021.04.02.03.05.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Apr 2021 03:05:29 -0700 (PDT) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH v3 13/25] media: venus: hfi: Add 6xx interrupt support Date: Fri, 2 Apr 2021 11:06:36 +0100 Message-Id: <20210402100648.1815854-14-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> References: <20210402100648.1815854-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Dikshita Agarwal This commit adds 6xx specific interrupt support, some register offsets and bitmasks differ from 4xx, which we account for in this commit. [bod: Added commit log. Moved register definition into commit] Signed-off-by: Dikshita Agarwal Co-developed-by: Bryan O'Donoghue Signed-off-by: Bryan O'Donoghue Acked-by: Stanimir Varbanov --- drivers/media/platform/qcom/venus/hfi_venus.c | 32 +++++++++++++------ 1 file changed, 23 insertions(+), 9 deletions(-) -- 2.30.1 diff --git a/drivers/media/platform/qcom/venus/hfi_venus.c b/drivers/media/platform/qcom/venus/hfi_venus.c index 5f9c8aa84cd0..09fc81da0645 100644 --- a/drivers/media/platform/qcom/venus/hfi_venus.c +++ b/drivers/media/platform/qcom/venus/hfi_venus.c @@ -359,8 +359,14 @@ static void venus_set_registers(struct venus_hfi_device *hdev) static void venus_soft_int(struct venus_hfi_device *hdev) { void __iomem *cpu_ic_base = hdev->core->cpu_ic_base; + u32 clear_bit; - writel(BIT(CPU_IC_SOFTINT_H2A_SHIFT), cpu_ic_base + CPU_IC_SOFTINT); + if (IS_V6(hdev->core)) + clear_bit = BIT(CPU_IC_SOFTINT_H2A_SHIFT_V6); + else + clear_bit = BIT(CPU_IC_SOFTINT_H2A_SHIFT); + + writel(clear_bit, cpu_ic_base + CPU_IC_SOFTINT); } static int venus_iface_cmdq_write_nolock(struct venus_hfi_device *hdev, @@ -474,8 +480,10 @@ static int venus_boot_core(struct venus_hfi_device *hdev) if (count >= max_tries) ret = -ETIMEDOUT; - if (IS_V6(hdev->core)) + if (IS_V6(hdev->core)) { + writel(0x1, cpu_cs_base + CPU_CS_H2XSOFTINTEN_V6); writel(0x0, cpu_cs_base + CPU_CS_X2RPMH_V6); + } return ret; } @@ -1061,14 +1069,20 @@ static irqreturn_t venus_isr(struct venus_core *core) return IRQ_NONE; status = readl(wrapper_base + WRAPPER_INTR_STATUS); - - if (status & WRAPPER_INTR_STATUS_A2H_MASK || - status & WRAPPER_INTR_STATUS_A2HWD_MASK || - status & CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK) - hdev->irq_status = status; - + if (IS_V6(core)) { + if (status & WRAPPER_INTR_STATUS_A2H_MASK || + status & WRAPPER_INTR_STATUS_A2HWD_MASK_V6 || + status & CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK) + hdev->irq_status = status; + } else { + if (status & WRAPPER_INTR_STATUS_A2H_MASK || + status & WRAPPER_INTR_STATUS_A2HWD_MASK || + status & CPU_CS_SCIACMDARG0_INIT_IDLE_MSG_MASK) + hdev->irq_status = status; + } writel(1, cpu_cs_base + CPU_CS_A2HSOFTINTCLR); - writel(status, wrapper_base + WRAPPER_INTR_CLEAR); + if (!IS_V6(core)) + writel(status, wrapper_base + WRAPPER_INTR_CLEAR); return IRQ_WAKE_THREAD; }