From patchwork Fri Mar 12 17:30:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 398665 Delivered-To: patch@linaro.org Received: by 2002:a02:8562:0:0:0:0:0 with SMTP id g89csp1383448jai; Fri, 12 Mar 2021 09:30:02 -0800 (PST) X-Google-Smtp-Source: ABdhPJzxtMxFpJVBvq5m685pI4syLo0rYR30mBbgmALeN75hT2I2+Y1hhoxKiw0fzk8FewfWID2l X-Received: by 2002:a17:906:1712:: with SMTP id c18mr9853947eje.417.1615570201971; Fri, 12 Mar 2021 09:30:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1615570201; cv=none; d=google.com; s=arc-20160816; b=SXdHznPO/OtxAP1jmJH335DIqLYDej6G/vr7geK6sTVO4IfyqFvFKmTx2WR/8SlgHT rPqMu4YVh3+ARkxYPbPgQygy3Dar7gnQe7mH9/pDStNQqbFRl/Ziz1UeVkPm9VGtPbiO l4/GNJyGe3/ngYYGvU329SZZB4IxHasUhjpiFP0WqFb0uqacvS/r+eQ6PY2gsigUl88o R52R548CjPRu7pLSyDXb91phDs2eD0Oqi1NxgocrR+0NatHulqRbi2BTDK770wOtfOIv CmPiD3A24R9FsZ/4H8bYcXtrlRIhU6JOows7k6PiU6Q8cJ28t/3mkFJ1o1eezO6oKoWT oS1A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=TCL7COtEazgKNnpkeM7OqtLt9j3hJXURS4OXneJfOeM=; b=dhjifUrCugiP3AF3vytiNJ2bN0nIttQI5KQAL7tq/tQNwN9p/bf3WnVwBpLTyS8jTw PmBNm2tbyvIF2p+Q1DWiO7XR7EmQcQZy7cmbJI/Y1vhDGD1s+EsQwUbGom7CB6TSidXL pvBprzJjoBM5VvPWUX1+pemvJutH2nyPWvVBUcvbxF/wTCWL/gS+OaWXfebV52wh2lUk /zpeV2yK9QW39FOUeYTuEzgtlKNDkbyJoU5IUmC58pjBfjxSszbbSPvhTr8d0IJXgNQ7 bP2hRcsElrZ6PGydipz7CK297FGfgvAhKbarGIfZPH2KwWf1Uf+k/VswdgpSlOypmhSO dO8Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=i0I7Itab; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id ot6si4540497ejb.337.2021.03.12.09.30.01; Fri, 12 Mar 2021 09:30:01 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=i0I7Itab; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232613AbhCLR3Z (ORCPT + 16 others); Fri, 12 Mar 2021 12:29:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41752 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232767AbhCLR3U (ORCPT ); Fri, 12 Mar 2021 12:29:20 -0500 Received: from mail-wr1-x431.google.com (mail-wr1-x431.google.com [IPv6:2a00:1450:4864:20::431]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4E2B1C061761 for ; Fri, 12 Mar 2021 09:29:20 -0800 (PST) Received: by mail-wr1-x431.google.com with SMTP id a18so5211895wrc.13 for ; Fri, 12 Mar 2021 09:29:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TCL7COtEazgKNnpkeM7OqtLt9j3hJXURS4OXneJfOeM=; b=i0I7Itab/QwS/dWgEZtR6Mz/+tsW2eTvp/FAYvIsLqqSUd+jGkH+Cf5kE0GH1DRti0 KXv0bSDRZf5RUir1Lkt9FYGidMc1SzXBIC8OzfKLWxocjY+LwSxSHFDJFxspoyYK+KUx 1R9LqDNFF/IpbBzItj6zE9i2KOYoHYTLv+gi9ORWCjqg/QQKOntqrDSCKknyALX1dgf2 1lK/bDIYdrj+uLC+NR74kHrPA1PDeQpvvMunSSdLZexrFK0U8/FnNagGlIHh2/wJ7Yh4 +DVmWi0LUFQaAMVvS5HHlWiyn5oWF1n+iLyeSdy5XMQnqzxymQSnuo/yeTbYfPcfjXnj wufQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TCL7COtEazgKNnpkeM7OqtLt9j3hJXURS4OXneJfOeM=; b=ra3zjQMchjv6CDzYWdTAxi5vvI3PqZpSkWfG8Wk4nMxVL6g/9Us5YGvZPFSnClrTEd nk8VWOsX8FozDLwqETsTaaFedaighesu7GR2PPBNNBYnLpJ7tXJ5MnB1x489hHT5WEOk 92UIL0l4MrQGBoXJ8VlrsGO33UWFuiSY8D1CQBApCgFxAHQWkVJekn6A5fsLZsg8P1h0 TBg+HWX14cyZbnNVlIsCgOlQdWR26tIZXABbx1TXbNU7um+zcS/QH5EWjcul6Caft5ef szLVYHIPoXDUy+JYKhNZuSWf3irCemS3KJMtK/478fAx6OGVNkbFwxf4IXbFzNWrIP8V vcxw== X-Gm-Message-State: AOAM530o4/ll1igOEUiUKoJgYTDaxUUGULe6lASWrGNq2G24VzcF1r8t LhWktUHom7Xvq/+LHkzILL56bw== X-Received: by 2002:adf:a4d1:: with SMTP id h17mr15234375wrb.57.1615570159005; Fri, 12 Mar 2021 09:29:19 -0800 (PST) Received: from sagittarius-a.chello.ie (188-141-3-169.dynamic.upc.ie. [188.141.3.169]) by smtp.gmail.com with ESMTPSA id 18sm2876375wmj.21.2021.03.12.09.29.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Mar 2021 09:29:18 -0800 (PST) From: Bryan O'Donoghue To: stanimir.varbanov@linaro.org, agross@kernel.org, bjorn.andersson@linaro.org, mchehab@kernel.org, linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org Cc: bryan.odonoghue@linaro.org, dikshita@codeaurora.org, jonathan@marek.ca, vgarodia@codeaurora.org Subject: [PATCH v2 07/25] media: venus: hfi: Define additional 6xx registers Date: Fri, 12 Mar 2021 17:30:21 +0000 Message-Id: <20210312173039.1387617-8-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.30.1 In-Reply-To: <20210312173039.1387617-1-bryan.odonoghue@linaro.org> References: <20210312173039.1387617-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Dikshita Agarwal - Add X2 RPMh registers and definitions from the downstream example. - Add 6xx core power definitions - Add 6xx AON definitions - Add 6xx wrapper tz definitions - Add 6xx wrapper interrupt definitions - Add 6xx soft interrupt definitions - Define wrapper LPI register offsets Signed-off-by: Dikshita Agarwal Co-developed-by: Bryan O'Donoghue Signed-off-by: Bryan O'Donoghue --- .../media/platform/qcom/venus/hfi_venus_io.h | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+) -- 2.30.1 diff --git a/drivers/media/platform/qcom/venus/hfi_venus_io.h b/drivers/media/platform/qcom/venus/hfi_venus_io.h index 8604b213f03f..300c6e47e72f 100644 --- a/drivers/media/platform/qcom/venus/hfi_venus_io.h +++ b/drivers/media/platform/qcom/venus/hfi_venus_io.h @@ -56,10 +56,22 @@ #define UC_REGION_ADDR 0x64 #define UC_REGION_SIZE 0x68 +#define CPU_CS_H2XSOFTINTEN_V6 0x148 + +#define CPU_CS_X2RPMH_V6 0x168 +#define CPU_CS_X2RPMH_MASK0_BMSK_V6 0x1 +#define CPU_CS_X2RPMH_MASK0_SHFT_V6 0x0 +#define CPU_CS_X2RPMH_MASK1_BMSK_V6 0x2 +#define CPU_CS_X2RPMH_MASK1_SHFT_V6 0x1 +#define CPU_CS_X2RPMH_SWOVERRIDE_BMSK_V6 0x4 +#define CPU_CS_X2RPMH_SWOVERRIDE_SHFT_V6 0x3 + /* Relative to CPU_IC_BASE */ #define CPU_IC_SOFTINT 0x18 +#define CPU_IC_SOFTINT_V6 0x150 #define CPU_IC_SOFTINT_H2A_MASK 0x8000 #define CPU_IC_SOFTINT_H2A_SHIFT 0xf +#define CPU_IC_SOFTINT_H2A_SHIFT_V6 0x0 /* Venus wrapper */ #define WRAPPER_BASE_V6 0x000b0000 @@ -88,6 +100,9 @@ #define WRAPPER_INTR_MASK_A2HCPU_MASK 0x4 #define WRAPPER_INTR_MASK_A2HCPU_SHIFT 0x2 +#define WRAPPER_INTR_STATUS_A2HWD_MASK_V6 0x8 +#define WRAPPER_INTR_MASK_A2HWD_BASK_V6 0x8 + #define WRAPPER_INTR_CLEAR 0x14 #define WRAPPER_INTR_CLEAR_A2HWD_MASK 0x10 #define WRAPPER_INTR_CLEAR_A2HWD_SHIFT 0x4 @@ -97,6 +112,8 @@ #define WRAPPER_POWER_STATUS 0x44 #define WRAPPER_VDEC_VCODEC_POWER_CONTROL 0x48 #define WRAPPER_VENC_VCODEC_POWER_CONTROL 0x4c +#define WRAPPER_DEBUG_BRIDGE_LPI_CONTROL_V6 0x54 +#define WRAPPER_DEBUG_BRIDGE_LPI_STATUS_V6 0x58 #define WRAPPER_VDEC_VENC_AHB_BRIDGE_SYNC_RESET 0x64 #define WRAPPER_CPU_CLOCK_CONFIG 0x2000 @@ -125,4 +142,17 @@ #define WRAPPER_VCODEC1_MMCC_POWER_STATUS 0x110 #define WRAPPER_VCODEC1_MMCC_POWER_CONTROL 0x114 +/* Venus 6xx */ +#define WRAPPER_CORE_POWER_STATUS_V6 0x80 +#define WRAPPER_CORE_POWER_CONTROL_V6 0x84 + +/* Wrapper TZ 6xx */ +#define WRAPPER_TZ_BASE_V6 0x000c0000 +#define WRAPPER_TZ_CPU_STATUS_V6 0x10 + +/* Venus AON */ +#define AON_BASE_V6 0x000e0000 +#define AON_WRAPPER_MVP_NOC_LPI_CONTROL 0x00 +#define AON_WRAPPER_MVP_NOC_LPI_STATUS 0x04 + #endif