From patchwork Tue Jan 5 12:26:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 356862 Delivered-To: patch@linaro.org Received: by 2002:a02:85a7:0:0:0:0:0 with SMTP id d36csp15765513jai; Tue, 5 Jan 2021 04:31:16 -0800 (PST) X-Google-Smtp-Source: ABdhPJy5cw5TJiGpiio+6nSSLVp8fgXu+4BYreWefprK9WqTzOtfAm/VrBwF4dDm3mH/7isrQ5yv X-Received: by 2002:a50:a692:: with SMTP id e18mr74400077edc.233.1609849876507; Tue, 05 Jan 2021 04:31:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1609849876; cv=none; d=google.com; s=arc-20160816; b=lyUpxCkqTPsJ0RfmVsYLyelh2DpB/wi7jw2S1qYySyuDzOX9h1hRVeZSZcD7Xe4bZC b+CMAiwi3r7MBaQ7sVholPRTfSIVM/nHKIeOtGWuYZfdWTVI9mLe6q4Ke/yKczF6ouzX eBMgK1lnnzf7SWM9z+Ben4EFgxaxQqIKT4PGQE5bJI4Cxl4G2aml/ohdWrOiQWtPmS2W Di5VDqrFhscrIKwJeU50tM1zriNwCUnrTvL5nvHOQ1bp8kpVxW9z33WAaLvvNlXTW1gx 8DH3Udvzp2GYIithAaHKNRzuE1eVmDnQlU02/ikju3JfLqeO77rjh2GqhnvPGFZP5uJV KPBg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=C3M1yGDo9sOujbh6Y3dKya3WVnGla1Jyt0Z8LN2HYb8=; b=Tn/9SHDbV+WYv+6ctMxk84kg7RQfI/Z7sWZEFERm/JA2vJJ2Em1dGgjBn+JXfN8Cs2 X0WPwNYSp6JDtuC1R90CA28AwZulS/XVwXpmnxnFDmEnNv19P5sBd1CwQrpZOmeGiepB pnwEL3ZvqljnzXiYEEeGAKizPBKx0TQx+iDXQphm5n4FjTdY7jaet4sAf+UjNheaf+/C gSLhRZt5NzyHwN0QhSuaqkpsJUueUE4BAK1mhJU6dlDCpbcloMRrtIsDqnGZjrnF0mvG fpuvzG5kqK35AAekDABkAgYQz3GhYt1boX4nr2ixFhmvT9gJyTGd5whEnJhLuMG4RQPv thJA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lWgXQbye; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id i8si20352221edu.515.2021.01.05.04.31.16; Tue, 05 Jan 2021 04:31:16 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lWgXQbye; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730204AbhAEM2e (ORCPT + 15 others); Tue, 5 Jan 2021 07:28:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37788 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730173AbhAEM2V (ORCPT ); Tue, 5 Jan 2021 07:28:21 -0500 Received: from mail-pl1-x633.google.com (mail-pl1-x633.google.com [IPv6:2607:f8b0:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E1091C0617A0 for ; Tue, 5 Jan 2021 04:27:10 -0800 (PST) Received: by mail-pl1-x633.google.com with SMTP id x18so16291884pln.6 for ; Tue, 05 Jan 2021 04:27:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=C3M1yGDo9sOujbh6Y3dKya3WVnGla1Jyt0Z8LN2HYb8=; b=lWgXQbyeAH+r0IxZoUcMpGxTqfmKINUBLurrnT5lDJuzGrqn+HUQw4bR0oIYnu3ARW bU++L4PLGLVP1/DEyx8M1mUFNnX9Qq1uvEZY3DFOtWf1n9zgzZEJiQ1NBJo7GcT5SN3t dIHMPT6qaZ9PmbGZoRzcTsY6LB2APLLkHj+C3tDqjU3hKzjlTH3+6tHc8aeZPyxR+vlN wQPlw2jBQrR5qfOJ/Ex1esZHxanlm0RNDKdgV6wNML2e5ajwG9gT4WaFl/isZ2aWOXVR j6y3piF7vIZgf/JgTt9e/2SMs675tBOWtcUip9HUQ/Ta+oqY2/ELKm0dbpvWITHzbLNO Oo6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=C3M1yGDo9sOujbh6Y3dKya3WVnGla1Jyt0Z8LN2HYb8=; b=D/KhzVTojxB51X/MQA9hZz4bIo+DGAySycztkvtEKnc+THby+oMIxWteYPr3n5FYRC JXe3tNhjulEmPHPe7OP7nqhMP4u/8i5TPmrSd328XpwtDhmekEwqNu3IJA69keI9wlin mg/npKMksm00g3yNP5kQO77qLvc/adwqTdEGWOsHn4PiPMqEJVqsxER2Nu5aoVnPU1jJ KEG81Ldx6ffyjqRuXYrvlGGx/MYbNZPt7vB+4DavtOvSHi8vqI2XAiMPm54FiLfAu7Ke s63uFzIbWeIblxdv6OSDtsuk70jtdvtMyInpQapNH7/pf8kBtq4Trjj/n7sheBg3WNPu BmHg== X-Gm-Message-State: AOAM530RijTZFdcZt6NmIwae/GLhSEbMskI0CgW6TKCcpkcdpBDYUg2S FNCjoDM0Umx/36WcWprTnI7M X-Received: by 2002:a17:903:22cb:b029:dc:8ac6:98ab with SMTP id y11-20020a17090322cbb02900dc8ac698abmr16157763plg.67.1609849630430; Tue, 05 Jan 2021 04:27:10 -0800 (PST) Received: from localhost.localdomain ([103.77.37.191]) by smtp.gmail.com with ESMTPSA id t22sm64745402pgm.18.2021.01.05.04.27.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Jan 2021 04:27:09 -0800 (PST) From: Manivannan Sadhasivam To: agross@kernel.org, bjorn.andersson@linaro.org Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH v2 04/18] ARM: dts: qcom: sdx55: Add support for SDHCI controller Date: Tue, 5 Jan 2021 17:56:35 +0530 Message-Id: <20210105122649.13581-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210105122649.13581-1-manivannan.sadhasivam@linaro.org> References: <20210105122649.13581-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add devicetree support for SDHCI controller found in Qualcomm SDX55 SoC. The SDHCI controller used in this SoC is based on the MSM SDHCI v5 IP. Hence, the support is added by reusing the existing sdhci driver with "qcom,sdhci-msm-v5" as the fallback. Signed-off-by: Manivannan Sadhasivam --- arch/arm/boot/dts/qcom-sdx55.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) -- 2.25.1 diff --git a/arch/arm/boot/dts/qcom-sdx55.dtsi b/arch/arm/boot/dts/qcom-sdx55.dtsi index eeb6bf392f93..3f8e98bfc020 100644 --- a/arch/arm/boot/dts/qcom-sdx55.dtsi +++ b/arch/arm/boot/dts/qcom-sdx55.dtsi @@ -154,6 +154,18 @@ blsp1_uart3: serial@831000 { status = "disabled"; }; + sdhc_1: sdhci@8804000 { + compatible = "qcom,sdx55-sdhci", "qcom,sdhci-msm-v5"; + reg = <0x08804000 0x1000>; + interrupts = , + ; + interrupt-names = "hc_irq", "pwr_irq"; + clocks = <&gcc GCC_SDCC1_AHB_CLK>, + <&gcc GCC_SDCC1_APPS_CLK>; + clock-names = "iface", "core"; + status = "disabled"; + }; + pdc: interrupt-controller@b210000 { compatible = "qcom,sdx55-pdc", "qcom,pdc"; reg = <0x0b210000 0x30000>;