| Message ID | 20201117134714.3456446-3-thara.gopinath@linaro.org |
|---|---|
| State | Accepted |
| Commit | dba6bc51975b54b0778678d581df5b423a5a0d81 |
| Headers | show |
| Series | Enable Qualcomm Crypto Engine on sdm845 | expand |
On Tue 17 Nov 07:47 CST 2020, Thara Gopinath wrote: > Qualcomm CE clock resource that is managed by BCM is required > by crypto driver to access the core clock. > ' ' after ':' in $subject With that Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, bjorn > Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org> > --- > drivers/clk/qcom/clk-rpmh.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c > index e2c669b08aff..7e2a4a9b9bf6 100644 > --- a/drivers/clk/qcom/clk-rpmh.c > +++ b/drivers/clk/qcom/clk-rpmh.c > @@ -349,6 +349,7 @@ DEFINE_CLK_RPMH_VRM(sdm845, rf_clk2, rf_clk2_ao, "rfclka2", 1); > DEFINE_CLK_RPMH_VRM(sdm845, rf_clk3, rf_clk3_ao, "rfclka3", 1); > DEFINE_CLK_RPMH_VRM(sm8150, rf_clk3, rf_clk3_ao, "rfclka3", 1); > DEFINE_CLK_RPMH_BCM(sdm845, ipa, "IP0"); > +DEFINE_CLK_RPMH_BCM(sdm845, ce, "CE0"); > > static struct clk_hw *sdm845_rpmh_clocks[] = { > [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw, > @@ -364,6 +365,7 @@ static struct clk_hw *sdm845_rpmh_clocks[] = { > [RPMH_RF_CLK3] = &sdm845_rf_clk3.hw, > [RPMH_RF_CLK3_A] = &sdm845_rf_clk3_ao.hw, > [RPMH_IPA_CLK] = &sdm845_ipa.hw, > + [RPMH_CE_CLK] = &sdm845_ce.hw, > }; > > static const struct clk_rpmh_desc clk_rpmh_sdm845 = { > -- > 2.25.1 >
diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c index e2c669b08aff..7e2a4a9b9bf6 100644 --- a/drivers/clk/qcom/clk-rpmh.c +++ b/drivers/clk/qcom/clk-rpmh.c @@ -349,6 +349,7 @@ DEFINE_CLK_RPMH_VRM(sdm845, rf_clk2, rf_clk2_ao, "rfclka2", 1); DEFINE_CLK_RPMH_VRM(sdm845, rf_clk3, rf_clk3_ao, "rfclka3", 1); DEFINE_CLK_RPMH_VRM(sm8150, rf_clk3, rf_clk3_ao, "rfclka3", 1); DEFINE_CLK_RPMH_BCM(sdm845, ipa, "IP0"); +DEFINE_CLK_RPMH_BCM(sdm845, ce, "CE0"); static struct clk_hw *sdm845_rpmh_clocks[] = { [RPMH_CXO_CLK] = &sdm845_bi_tcxo.hw, @@ -364,6 +365,7 @@ static struct clk_hw *sdm845_rpmh_clocks[] = { [RPMH_RF_CLK3] = &sdm845_rf_clk3.hw, [RPMH_RF_CLK3_A] = &sdm845_rf_clk3_ao.hw, [RPMH_IPA_CLK] = &sdm845_ipa.hw, + [RPMH_CE_CLK] = &sdm845_ce.hw, }; static const struct clk_rpmh_desc clk_rpmh_sdm845 = {
Qualcomm CE clock resource that is managed by BCM is required by crypto driver to access the core clock. Signed-off-by: Thara Gopinath <thara.gopinath@linaro.org> --- drivers/clk/qcom/clk-rpmh.c | 2 ++ 1 file changed, 2 insertions(+)