From patchwork Mon Aug 24 18:37:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rob Clark X-Patchwork-Id: 250548 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.6 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D533EC433E1 for ; Mon, 24 Aug 2020 18:42:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B152D2074D for ; Mon, 24 Aug 2020 18:42:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="KwlyeuB0" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726999AbgHXSm0 (ORCPT ); Mon, 24 Aug 2020 14:42:26 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45134 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726853AbgHXSmT (ORCPT ); Mon, 24 Aug 2020 14:42:19 -0400 Received: from mail-pg1-x543.google.com (mail-pg1-x543.google.com [IPv6:2607:f8b0:4864:20::543]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 04744C061574; Mon, 24 Aug 2020 11:42:18 -0700 (PDT) Received: by mail-pg1-x543.google.com with SMTP id i10so4998081pgk.1; Mon, 24 Aug 2020 11:42:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=qzWQCEAvxCv0hKpjyi842jRFwqaWI9Jm91Nndi5IFE8=; b=KwlyeuB0tEDm/a2EZ0NhqVfKxnkgghXFNQHEb7kaRzY8NOp4BYLBGQpp5a5wKlwBOT L9rAt9AT5+mQvkv0AykyB53qBc1xGbpJrptm+JZEmf8vQYwa8Dnt0hCFACf9hMdWkqp7 JxcNvEaqyyAvjlN6PQ/Bjh6CF9Ycun+BoUZFTH62XDdNTGyXGmO0S651znH0wFRz2Zww sXYANT+7Yp+37dB89pFEZzoCKsRJMWxWU9AXEseW6pMZTG6i8AoHNbOl7kokLvfkvNp8 U07LanP70VaclSMo575cM7YkYtmDgKv+CnUvfHTwuPIrhVE5iOeR2FVlyIzfAuw8arhM 5hNw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qzWQCEAvxCv0hKpjyi842jRFwqaWI9Jm91Nndi5IFE8=; b=hqvnfnYMCASk1ZLsaSaKGJZs8KUEDPD3yLKDOs8CbwRQzQF3MrLK4IHd0qEOI26Y3f JC9IimDmf9HwYQfPPrNtqBibqD/xZjehdGhaiY0Q/lt0hmaQG4jM8wwOg5Cst6xaWeRP u9AN/b2LpdS2u5I6CkaEPOSa3qgGKIN8nqdOyw3jYbkr11XGkZZfGmFZbirjhh/t2JxG ddvyVZgUHq60AVbtwCrXOsgmUXnpMMPlfBF9M9lAohUJ6Y1R21PEUob3Y2CbcWpZBtKZ 6IaNrxPHGModde0+LK/tZFnr9JNv4Gg6ubF2NK/wiOGUQgmTt+qaiH2b0ht9mmBuZoEn MwiQ== X-Gm-Message-State: AOAM532qtmFbVz9nnU2KdmZjVoAeuyYpJbe64PME2SjodQCLhmZOYyLA LKF8r2YaXUKjW1G64GuhuVg= X-Google-Smtp-Source: ABdhPJxSjEDwmjmh8UxD0TCGAsX4kaChXpZTTFF2qPQgFhL258x4Gj0h3d6KlPMcds/+HCtuRW2wXw== X-Received: by 2002:a63:1704:: with SMTP id x4mr4038217pgl.186.1598294538284; Mon, 24 Aug 2020 11:42:18 -0700 (PDT) Received: from localhost ([2601:1c0:5200:a6:307:a401:7b76:c6e5]) by smtp.gmail.com with ESMTPSA id a19sm12255705pfn.10.2020.08.24.11.42.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Aug 2020 11:42:17 -0700 (PDT) From: Rob Clark To: dri-devel@lists.freedesktop.org, iommu@lists.linux-foundation.org Cc: Sai Prakash Ranjan , Will Deacon , freedreno@lists.freedesktop.org, Bjorn Andersson , Sibi Sankar , Vivek Gautam , Stephen Boyd , Robin Murphy , Joerg Roedel , Rob Clark , Akhil P Oommen , AngeloGioacchino Del Regno , Ben Dooks , Brian Masney , Eric Anholt , Joerg Roedel , John Stultz , Jonathan Marek , Jordan Crouse , Rob Clark , Sean Paul , David Airlie , Daniel Vetter , Shawn Guo , Sharat Masetty , linux-arm-msm@vger.kernel.org (open list:DRM DRIVER FOR MSM ADRENO GPU), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 07/20] drm/msm: set adreno_smmu as gpu's drvdata Date: Mon, 24 Aug 2020 11:37:41 -0700 Message-Id: <20200824183825.1778810-8-robdclark@gmail.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200824183825.1778810-1-robdclark@gmail.com> References: <20200824183825.1778810-1-robdclark@gmail.com> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Rob Clark This will be populated by adreno-smmu, to provide a way for coordinating enabling/disabling TTBR0 translation. Signed-off-by: Rob Clark Reviewed-by: Jordan Crouse --- drivers/gpu/drm/msm/adreno/adreno_device.c | 2 -- drivers/gpu/drm/msm/msm_gpu.c | 2 +- drivers/gpu/drm/msm/msm_gpu.h | 6 +++++- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c index 26664e1b30c0..58e03b20e1c7 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_device.c +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c @@ -417,8 +417,6 @@ static int adreno_bind(struct device *dev, struct device *master, void *data) return PTR_ERR(gpu); } - dev_set_drvdata(dev, gpu); - return 0; } diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 6aa9e04e52e7..806eb0957280 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -892,7 +892,7 @@ int msm_gpu_init(struct drm_device *drm, struct platform_device *pdev, gpu->gpu_cx = NULL; gpu->pdev = pdev; - platform_set_drvdata(pdev, gpu); + platform_set_drvdata(pdev, &gpu->adreno_smmu); msm_devfreq_init(gpu); diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index 8bda7beaed4b..f91b141add75 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -7,6 +7,7 @@ #ifndef __MSM_GPU_H__ #define __MSM_GPU_H__ +#include #include #include #include @@ -73,6 +74,8 @@ struct msm_gpu { struct platform_device *pdev; const struct msm_gpu_funcs *funcs; + struct adreno_smmu_priv adreno_smmu; + /* performance counters (hw & sw): */ spinlock_t perf_lock; bool perfcntr_active; @@ -143,7 +146,8 @@ struct msm_gpu { static inline struct msm_gpu *dev_to_gpu(struct device *dev) { - return dev_get_drvdata(dev); + struct adreno_smmu_priv *adreno_smmu = dev_get_drvdata(dev); + return container_of(adreno_smmu, struct msm_gpu, adreno_smmu); } /* It turns out that all targets use the same ringbuffer size */