From patchwork Tue Oct 29 16:44:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 178043 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp52170ill; Tue, 29 Oct 2019 09:45:08 -0700 (PDT) X-Google-Smtp-Source: APXvYqzyXfGtUx7OaDoSFhYR/XR3EjJDZet2j6PhMk5Tdt9livHVp63uHR7J0jh28SqHcbOQnbIL X-Received: by 2002:a17:906:27c5:: with SMTP id k5mr4182607ejc.173.1572367508180; Tue, 29 Oct 2019 09:45:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572367508; cv=none; d=google.com; s=arc-20160816; b=Vo/hU8c1OASVOU8hGjtydx1UrC5uDH6J5EFwMHQG4muc+8p55TRemMzjgd0dLVpPoG lv4+MAvZY3vbt8kk00+AfMOKy0fKP+W1+vBaHifiXsqCZ8I3UMyOGK8+m3Tk4rP741kO D4bLQtq4/fm1ervbqcve0Ib1ZX9LlnL7Q6vSMYPqbNl7AXqYmYf70x5MNFjo9M91H3kT DCcP26sGG5pJKgY7YnFfU8CBtGjOBbZXVYwMVyLRryWgDl7OamzlA9f5Qg1j930tjPZa jbMrnwwogEi8roTW1c9FA5+N+t4yArxXzInr8C62ZqJLL7vaKBSBD9v1BX0WdvWg/ZH2 An/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=vwZc8kmFy7PANbXlKQ6pebxa/rQt81fGNlatlAwVkyY=; b=yUC4IzV4EsGdPm8iPeYgffO80eRX9vUdau3MP05wRkeT0NaM2RmT7Dnk0hlI/Rfnax BJqnk0MRKRgVyfrhdKmnAa8UHP6V3lk+w8QcuseQz+F82N3B2wLB3ur6C2c51iDp0iCH 5hhOAJj3dMUZiP3eIS2caBolhCCFTQWDVuBVuGNfVBSv2wiSPqGNUxFFk3BT7ZCAvxO1 ewcugKAVCW02SNIvxxthK6obHKDZug2ToznugfiwbGi0TR9cow+aHlzKBiJdEwUPoPYT Wl7hL6LJGgQP6GO2ptLV9VT5dBAbBsTS90LIp3rGMjsU+H315tbK5qYawUOlHuHug4kC +nBw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fOtx+sxl; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d10si11002823edb.226.2019.10.29.09.45.08; Tue, 29 Oct 2019 09:45:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fOtx+sxl; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390644AbfJ2QpH (ORCPT + 15 others); Tue, 29 Oct 2019 12:45:07 -0400 Received: from mail-lf1-f65.google.com ([209.85.167.65]:33353 "EHLO mail-lf1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390651AbfJ2QpH (ORCPT ); Tue, 29 Oct 2019 12:45:07 -0400 Received: by mail-lf1-f65.google.com with SMTP id y127so11078570lfc.0 for ; Tue, 29 Oct 2019 09:45:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vwZc8kmFy7PANbXlKQ6pebxa/rQt81fGNlatlAwVkyY=; b=fOtx+sxl1X6dXEMgiZzjAp5+wekh0iKtzO7J+xgzDvSNTad4qHfvVwMUAKQhAIQ8jf Ekd2ueLYicVs3TL/Su+e0oV8sGSqrcqChCs+kglR/KfEM8yNm5XCIJiZElqvYXJLlNRu rsbE4lCNknRG6peGNSu3DERrS+Wd1oPFG6FWPvHOZxQGapfN/6lVMrJq1WfG+hZDld6V WgFy5gf+RRh6SEierUrRfKLj2smidEY2EgDnCKGsg23iaz6hPer8iczkGSDYb6iHsze0 8DyoQtspp0iZSrYX7pWVw1f0BJVkeTCFWfp9XhfTmL2YRdedbE3ZE50LbhvOtAYT3CJB 7fwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vwZc8kmFy7PANbXlKQ6pebxa/rQt81fGNlatlAwVkyY=; b=MwhdpK3u2sskPMkJLSL4pKG5Cb3Tb0jtyXBda+lgqPxnNhFy0uafv4EqE0OfrH9mZR 2mtXrGT/6kgFodTmiKnfSfzBXPC5MXVsCPqkYLeSrohoK9lPDkiDgdTgi9pLgjRH1xMc ynY63cCuFcka7LDh1hIgQsMVw97gbOlpjipMXMB/fLOlf1//qMq0mQvvtRWhxhAU2h5K cGBWY8uAZnRl6J5RptBzoRR4tD0V4B6801FD8Qov+1qxwRFd8vS3oGu3lpzc4rXMXPFm gOkCBMp5ILKNv1QiyIwSba8sEfu+hb0y5+pxqKNYj/2bhnQDPUojh3wwIAnHX+MTl1RG jhUw== X-Gm-Message-State: APjAAAXbKqD4lwWBCCgl8SE6XRrZavq0L8pJBMdbxrbHElFKx9gYybaB YBwGZFNz6RJibLUbQnSRqXSa0g== X-Received: by 2002:a19:7511:: with SMTP id y17mr3184754lfe.19.1572367504558; Tue, 29 Oct 2019 09:45:04 -0700 (PDT) Received: from localhost.localdomain (h-158-174-22-210.NA.cust.bahnhof.se. [158.174.22.210]) by smtp.gmail.com with ESMTPSA id f28sm2048161lfh.35.2019.10.29.09.45.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2019 09:45:03 -0700 (PDT) From: Ulf Hansson To: "Rafael J . Wysocki" , Daniel Lezcano , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Lina Iyer , linux-pm@vger.kernel.org Cc: Rob Herring , Vincent Guittot , Stephen Boyd , Andy Gross , Bjorn Andersson , Kevin Hilman , Ulf Hansson , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Lina Iyer Subject: [PATCH v2 13/13] arm64: dts: Convert to the hierarchical CPU topology layout for MSM8916 Date: Tue, 29 Oct 2019 17:44:38 +0100 Message-Id: <20191029164438.17012-14-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191029164438.17012-1-ulf.hansson@linaro.org> References: <20191029164438.17012-1-ulf.hansson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org To enable the OS to better support PSCI OS initiated CPU suspend mode, let's convert from the flattened layout to the hierarchical layout. In the hierarchical layout, let's create a power domain provider per CPU and describe the idle states for each CPU inside the power domain provider node. To group the CPUs into a cluster, let's add another power domain provider and make it act as the master domain. Note that, the CPU's idle states remains compatible with "arm,idle-state", while the cluster's idle state becomes compatible with "domain-idle-state". Co-developed-by: Lina Iyer Signed-off-by: Lina Iyer Signed-off-by: Ulf Hansson --- Changes in v2: - Dropped CC of Andy, due to wrong email anyway. Instead include him for the series. --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 57 +++++++++++++++++++++++++-- 1 file changed, 53 insertions(+), 4 deletions(-) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 5ea9fb8f2f87..1ece0c763592 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -102,10 +102,11 @@ reg = <0x0>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD0>; + power-domain-names = "psci"; }; CPU1: cpu@1 { @@ -114,10 +115,11 @@ reg = <0x1>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD1>; + power-domain-names = "psci"; }; CPU2: cpu@2 { @@ -126,10 +128,11 @@ reg = <0x2>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD2>; + power-domain-names = "psci"; }; CPU3: cpu@3 { @@ -138,10 +141,11 @@ reg = <0x3>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&apcs>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD3>; + power-domain-names = "psci"; }; L2_0: l2-cache { @@ -161,12 +165,57 @@ min-residency-us = <2000>; local-timer-stop; }; + + CLUSTER_RET: cluster-retention { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x41000012>; + entry-latency-us = <500>; + exit-latency-us = <500>; + min-residency-us = <2000>; + }; + + CLUSTER_PWRDN: cluster-gdhs { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x41000032>; + entry-latency-us = <2000>; + exit-latency-us = <2000>; + min-residency-us = <6000>; + }; }; }; psci { compatible = "arm,psci-1.0"; method = "smc"; + + CPU_PD0: cpu-pd0 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CPU_PD1: cpu-pd1 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CPU_PD2: cpu-pd2 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CPU_PD3: cpu-pd3 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SLEEP_0>; + }; + + CLUSTER_PD: cluster-pd { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>; + }; }; pmu {