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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id x3sm3935192pgt.45.2019.01.17.11.30.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 17 Jan 2019 11:30:34 -0800 (PST) From: Bjorn Andersson To: Andy Gross , David Brown Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Doug Anderson Subject: [PATCH] arm64: dts: qcom: sdm845: Fix lpasscc reg Date: Thu, 17 Jan 2019 11:29:55 -0800 Message-Id: <20190117192955.16515-1-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Fix up the lpasscc address and size, missed during the conversion to address- and size-cells of 2. Reported-by: Doug Anderson Signed-off-by: Bjorn Andersson --- This goes ontop of my pull request to Andy available until it's picked up at: https://github.com/andersson/kernel/commits/for-andy/arm64-for-5.1 arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.18.0 Reviewed-by: Douglas Anderson diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index e4156ea320aa..920bdb03a9db 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2031,7 +2031,7 @@ lpasscc: clock-controller@17014000 { compatible = "qcom,sdm845-lpasscc"; - reg = <0x17014000 0x1f004>, <0x17300000 0x200>; + reg = <0 0x17014000 0 0x1f004>, <0 0x17300000 0 0x200>; reg-names = "cc", "qdsp6ss"; #clock-cells = <1>; status = "disabled";