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[209.132.180.67]) by mx.google.com with ESMTP id i13si2932745pgj.199.2018.12.07.07.29.58; Fri, 07 Dec 2018 07:29:58 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=e++UA0uH; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726245AbeLGP3h (ORCPT + 15 others); Fri, 7 Dec 2018 10:29:37 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:46244 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726229AbeLGP3g (ORCPT ); Fri, 7 Dec 2018 10:29:36 -0500 Received: by mail-wr1-f67.google.com with SMTP id l9so4137508wrt.13 for ; Fri, 07 Dec 2018 07:29:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=KvtupwCwXR8Q8slD54MYCwBpuj1TGFpcxOPBLUHvICE=; b=e++UA0uHQ+6kLE3FaVwB/Z/N+4Y9y2pbkIaEj9J915heUrdAw+qXrIT07nbF363x44 UCMXcfvWRpmSW/Hvao1JtGXn+g2FcPwJ9WKqHV+S/PktliZ+gLTV0W7IKOkwyEFtiRuN yAU8GFYDaSQVhSpj0GfdR1Y/t6RtGDbtt8SUs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=KvtupwCwXR8Q8slD54MYCwBpuj1TGFpcxOPBLUHvICE=; b=hduQtPNrvMem0M9un4aTpK9o6hCns5FBrQFc3vSKVvjXe3FSM35Rl68vgjzY0/T5VQ by7TDJvr9ZgiDohRSRJCJ/lQAWhHhbNRcfRgQzgh/KJ4fQGCDWXNIS3npwJTcVj/I+/e CbnUDCiSjYouOQ4hRLCA53IsoAjk0zq2f9ihspC4CQTECXY/aIMjtncXaIrgAapA5MZZ LqDMCD81GLVwnWuak0iO+k+zVBcxs38Cv3baWEKEt8KzJ2JodE4Xd0a9hnqoxieTDoIi OgoYAfEkKXhFUEK1ECEk+2NHsjJrDR3cBbopV32Lp/eJwO8yw8weGBj6IwXG+U5wBXvF O+4w== X-Gm-Message-State: AA+aEWbkeSvI6lPbA219+YVmkEJX//28XrCZf4jfgTD4w9GXC2se4/hC hcOlbnWQsujATCnZ1Tfge4c5lQ== X-Received: by 2002:a5d:448f:: with SMTP id j15mr2071427wrq.108.1544196573739; Fri, 07 Dec 2018 07:29:33 -0800 (PST) Received: from localhost.localdomain ([212.45.67.2]) by smtp.googlemail.com with ESMTPSA id y145sm2728721wmd.30.2018.12.07.07.29.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 07 Dec 2018 07:29:32 -0800 (PST) From: Georgi Djakov To: gregkh@linuxfoundation.org, linux-pm@vger.kernel.org Cc: rjw@rjwysocki.net, robh+dt@kernel.org, mturquette@baylibre.com, khilman@baylibre.com, vincent.guittot@linaro.org, skannan@codeaurora.org, bjorn.andersson@linaro.org, amit.kucheria@linaro.org, seansw@qti.qualcomm.com, daidavid1@codeaurora.org, evgreen@chromium.org, dianders@chromium.org, mark.rutland@arm.com, lorenzo.pieralisi@arm.com, abailon@baylibre.com, maxime.ripard@bootlin.com, arnd@arndb.de, thierry.reding@gmail.com, ksitaraman@nvidia.com, sanjayc@nvidia.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-tegra@vger.kernel.org, georgi.djakov@linaro.org Subject: [PATCH v11 6/8] arm64: dts: sdm845: Add interconnect provider DT nodes Date: Fri, 7 Dec 2018 17:29:15 +0200 Message-Id: <20181207152917.4862-7-georgi.djakov@linaro.org> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181207152917.4862-1-georgi.djakov@linaro.org> References: <20181207152917.4862-1-georgi.djakov@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: David Dai Add RSC (Resource State Coordinator) provider dictating network-on-chip interconnect bus performance found on SDM845-based platforms. Signed-off-by: David Dai Signed-off-by: Georgi Djakov --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index b72bdb0a31a5..b3cd256a154e 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -1324,6 +1324,11 @@ compatible = "qcom,sdm845-rpmh-clk"; #clock-cells = <1>; }; + + rsc_hlos: interconnect { + compatible = "qcom,sdm845-rsc-hlos"; + #interconnect-cells = <1>; + }; }; intc: interrupt-controller@17a00000 {