From patchwork Fri Nov 30 06:52:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 152489 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3313212ljp; Thu, 29 Nov 2018 22:55:15 -0800 (PST) X-Google-Smtp-Source: AFSGD/VN8rN0oIulHkaxTPu/df6Z5azLH5ahkjF5VGIPsBb7HLmr8bn393BrFXttErFx63eDoxRC X-Received: by 2002:a17:902:2c03:: with SMTP id m3mr4704292plb.125.1543560915649; Thu, 29 Nov 2018 22:55:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543560915; cv=none; d=google.com; s=arc-20160816; b=ToTB3j5mvDshbJtIT8RxXiX3Z9iDIw2rSFFZB0g9b1tuiSYFIONFVzDj7qYGmN40CU v9a/ScOUI/iBTSanZUKdNo1ZqxwPSfNKCVJffLe4t/7W+dAzeKuZifqewL5+/Sse8nWk 0GjrmyWwUgIlpkigK0RQRYKtBSEtanJ61iTDWQnqT6v+IpbdtqWHEis610WExWGj7UGj TpkIBK6AubZu9EzbwqXoW73YXWjtf6bYuU/itLqvg9ulftKMDgwaGNcxZ1dab+NcNRMx lIJB9NlfCQO9KveCuv6UrwO7+M49JAHM9G1k728+oJpZFfpfQOAJZBXfXI/Mo7V1XG/i cHbA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=QZvfeZHAnMUYvaTlclKUDRPDClRnA84dF7+NxVt5aH0=; b=a5LPjLrql9OMq0qat2/PRSvosqrySmUOHH1s0yw5qzZkvJuqryWKKbEvYV+htywMok MpVvkCcWD/mdSBjDlJiyO3v9yiT+cDSUC04SdLNrHukhLCSvIAKlKKqPuJfv98kqtsjD TTtrdpYEdb2rCqFrOZSs0huwFLTHnW5cgaAuxLDDEcF4f1CMcraWtDEHfwr05Mpk0e/v S5EjpDi26OKjaJ0Kk/fKzH7AGVrtKgTK7ZQTuhYN6JmuPxwsZz9i9A3Jiw74VYmUlxQe xPCG2FMWj/+VKaqLIux5IO9OXNJTvl6pC5WIexrk9H5igH61TM9D11ycP4e7NMhdOVhP s6Ag== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="F2Cxd1+/"; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 197si4053501pgb.564.2018.11.29.22.55.15; Thu, 29 Nov 2018 22:55:15 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="F2Cxd1+/"; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726956AbeK3SD2 (ORCPT + 15 others); Fri, 30 Nov 2018 13:03:28 -0500 Received: from mail-pg1-f193.google.com ([209.85.215.193]:44355 "EHLO mail-pg1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726950AbeK3SD2 (ORCPT ); Fri, 30 Nov 2018 13:03:28 -0500 Received: by mail-pg1-f193.google.com with SMTP id t13so2068805pgr.11 for ; Thu, 29 Nov 2018 22:55:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=QZvfeZHAnMUYvaTlclKUDRPDClRnA84dF7+NxVt5aH0=; b=F2Cxd1+/NgU9DvQMYjySSP3ukJj+V6MQPz7ppeA7g8INTA1Z8RczvMqTY7xGahlzhL 0Ve8Xvd3kf0j4jBFkkq+YkA3X2c31GJhDo3a86+qBqgTYul9O0oO+HvjHuOTuhliXDuk C8T2Akw3Sb6yOuIQZekJZem8kVcyEe6A0wT1E= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=QZvfeZHAnMUYvaTlclKUDRPDClRnA84dF7+NxVt5aH0=; b=E5G6uPEAgFsWonBmx9gmEf4O/xebMXGvIn2VcMfk9Ng84PB5rI0CgKrjKlQLkbJajO GDWbwAcJvNbrTenr5VLrUBS4ziOqxNjmhnDE4QkbpMnxz8x9zK7EVzyC3kgK9C0sZmJb v1wN+XqkzOUuAgCnj74UdDTpz1zAxF+WJUBXveAS2evrWuUdBSH7tvKglBWowJQBrpKR 02elvuwLhIGrB1IZjSAf38nNA5Wc2T3snKKZc+zlmqVaYdx3wO0EUOWsqPFLc1lfNLDd 15FRJZT13kh96lKxINMZKUUvbPnmt3zZweNmj8fA9Ul1Q1bIS81v6GYrE3PuNA01SQOi X3yw== X-Gm-Message-State: AA+aEWYOchTPWQxv3EFVfHPJkomRlmcWB90Xxp5w04rMx/5+aDWBGWzb iGNs3ksbWheSHXYdjkKCGJiM+Q== X-Received: by 2002:a63:d34a:: with SMTP id u10mr3937210pgi.301.1543560911037; Thu, 29 Nov 2018 22:55:11 -0800 (PST) Received: from localhost.localdomain (104-188-17-28.lightspeed.sndgca.sbcglobal.net. [104.188.17.28]) by smtp.gmail.com with ESMTPSA id w128sm5859175pfw.79.2018.11.29.22.55.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 22:55:10 -0800 (PST) From: Bjorn Andersson To: Michael Turquette , Stephen Boyd Cc: Andy Gross , David Brown , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Marc Gonzalez , Amit Kucheria Subject: [PATCH 2/3] clk: qcom: gcc-msm8998: Disable halt check of UFS clocks Date: Thu, 29 Nov 2018 22:52:58 -0800 Message-Id: <20181130065259.26497-3-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20181130065259.26497-1-bjorn.andersson@linaro.org> References: <20181130065259.26497-1-bjorn.andersson@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Drop the halt check of the UFS symbol clocks, in accordance with other platforms. This makes clk_disable_unused() happy and makes it possible to turn the clocks on again without an error. Signed-off-by: Bjorn Andersson --- drivers/clk/qcom/gcc-msm8998.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- 2.18.0 diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c index d89f8e7c2a59..3d232d266d72 100644 --- a/drivers/clk/qcom/gcc-msm8998.c +++ b/drivers/clk/qcom/gcc-msm8998.c @@ -2403,7 +2403,7 @@ static struct clk_branch gcc_ufs_phy_aux_clk = { static struct clk_branch gcc_ufs_rx_symbol_0_clk = { .halt_reg = 0x75014, - .halt_check = BRANCH_HALT, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x75014, .enable_mask = BIT(0), @@ -2416,7 +2416,7 @@ static struct clk_branch gcc_ufs_rx_symbol_0_clk = { static struct clk_branch gcc_ufs_rx_symbol_1_clk = { .halt_reg = 0x7605c, - .halt_check = BRANCH_HALT, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x7605c, .enable_mask = BIT(0), @@ -2429,7 +2429,7 @@ static struct clk_branch gcc_ufs_rx_symbol_1_clk = { static struct clk_branch gcc_ufs_tx_symbol_0_clk = { .halt_reg = 0x75010, - .halt_check = BRANCH_HALT, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x75010, .enable_mask = BIT(0),