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[209.132.180.67]) by mx.google.com with ESMTP id m16si3471333plk.781.2017.08.24.10.36.49; Thu, 24 Aug 2017 10:36:49 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=Sf7b3GPi; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753853AbdHXRgs (ORCPT + 9 others); Thu, 24 Aug 2017 13:36:48 -0400 Received: from mail-wr0-f182.google.com ([209.85.128.182]:36148 "EHLO mail-wr0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753228AbdHXRgr (ORCPT ); Thu, 24 Aug 2017 13:36:47 -0400 Received: by mail-wr0-f182.google.com with SMTP id p14so417126wrg.3 for ; Thu, 24 Aug 2017 10:36:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=/asVdOAkurrWvPdCyjfl3/+aAIXSqDQstBgDEwVbXY8=; b=Sf7b3GPirYbSmgOBTEpCJio6FnzxtSf17aG9gyChw2YA2qhbcyEFuOSOIGNPrLOA21 pZYXb1SNdAUrv/Fepw2ZY+QnREerSHKLahIdBvaa/dfH2r3yPFsKax2GmKP0z0ZX9uvc aRxJuwmXavuA3BJOSU9uA3gsYyx7FMgIHs3vA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=/asVdOAkurrWvPdCyjfl3/+aAIXSqDQstBgDEwVbXY8=; b=BwsAY5LrajfNt9iGrGYwZLzSQi7T9qcGouxWqOo2jjigPnzUO+uQZftQ6WA/GK8W0s gioparCXZ2CkQY3qGK6L73ijoBMqQCovZw+TspfyGoJtnKIuQzw7hfEY2QaDhjJ/YXL5 4n88yIEo4lIYSe6i4kN04y+uN2doUrfwMzE8qLS4EhfQHyYkRwtfi/LWX4vKgISFMF9z 6wFDUa0Ab9RYOR3CC5dD4zOOGp5cSuyi2vIRVf792WwSKSrIhMxyzMHEDYywK1IzMCOM LN05ZNvJGtoe99XRwZfJ3nxXUxtp4E+DbyLApRF3tQB2mQXNnjmKCfq8Gaqj2cYc5OTW qDjg== X-Gm-Message-State: AHYfb5j0H5yA4Qt6qcZ//P7WIKCBWztMAJBqOAGKegCW+UkuCaYCB38x LtWvmkgG5R/LN/Ek X-Received: by 10.223.141.212 with SMTP id o78mr5225714wrb.215.1503596206076; Thu, 24 Aug 2017 10:36:46 -0700 (PDT) Received: from mms-0441.qualcomm.mm-sol.com ([212.45.67.2]) by smtp.googlemail.com with ESMTPSA id y201sm2671641wmd.14.2017.08.24.10.36.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 24 Aug 2017 10:36:45 -0700 (PDT) From: Georgi Djakov To: sboyd@codeaurora.org Cc: mturquette@baylibre.com, robdclark@gmail.com, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, georgi.djakov@linaro.org Subject: [PATCH] clk: qcom: Remove unused RCG ops Date: Thu, 24 Aug 2017 20:36:44 +0300 Message-Id: <20170824173644.10305-1-georgi.djakov@linaro.org> X-Mailer: git-send-email 2.13.0 In-Reply-To: <20170823225543.GJ21656@codeaurora.org> References: <20170823225543.GJ21656@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The RCGs ops for shared branches are not used now, so remove it. Signed-off-by: Georgi Djakov --- drivers/clk/qcom/clk-rcg.h | 3 -- drivers/clk/qcom/clk-rcg2.c | 79 --------------------------------------------- 2 files changed, 82 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers/clk/qcom/clk-rcg.h index 1b3e8d265bdb..a2495457e564 100644 --- a/drivers/clk/qcom/clk-rcg.h +++ b/drivers/clk/qcom/clk-rcg.h @@ -156,7 +156,6 @@ extern const struct clk_ops clk_dyn_rcg_ops; * @hid_width: number of bits in half integer divider * @parent_map: map from software's parent index to hardware's src_sel field * @freq_tbl: frequency table - * @current_freq: last cached frequency when using branches with shared RCGs * @clkr: regmap clock handle * */ @@ -166,7 +165,6 @@ struct clk_rcg2 { u8 hid_width; const struct parent_map *parent_map; const struct freq_tbl *freq_tbl; - unsigned long current_freq; struct clk_regmap clkr; }; @@ -174,7 +172,6 @@ struct clk_rcg2 { extern const struct clk_ops clk_rcg2_ops; extern const struct clk_ops clk_rcg2_floor_ops; -extern const struct clk_ops clk_rcg2_shared_ops; extern const struct clk_ops clk_edp_pixel_ops; extern const struct clk_ops clk_byte_ops; extern const struct clk_ops clk_byte2_ops; diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c index 1a0985ae20d2..bbeaf9c09dbb 100644 --- a/drivers/clk/qcom/clk-rcg2.c +++ b/drivers/clk/qcom/clk-rcg2.c @@ -358,85 +358,6 @@ const struct clk_ops clk_rcg2_floor_ops = { }; EXPORT_SYMBOL_GPL(clk_rcg2_floor_ops); -static int clk_rcg2_shared_force_enable(struct clk_hw *hw, unsigned long rate) -{ - struct clk_rcg2 *rcg = to_clk_rcg2(hw); - const char *name = clk_hw_get_name(hw); - int ret, count; - - /* force enable RCG */ - ret = regmap_update_bits(rcg->clkr.regmap, rcg->cmd_rcgr + CMD_REG, - CMD_ROOT_EN, CMD_ROOT_EN); - if (ret) - return ret; - - /* wait for RCG to turn ON */ - for (count = 500; count > 0; count--) { - ret = clk_rcg2_is_enabled(hw); - if (ret) - break; - udelay(1); - } - if (!count) - pr_err("%s: RCG did not turn on\n", name); - - /* set clock rate */ - ret = __clk_rcg2_set_rate(hw, rate, CEIL); - if (ret) - return ret; - - /* clear force enable RCG */ - return regmap_update_bits(rcg->clkr.regmap, rcg->cmd_rcgr + CMD_REG, - CMD_ROOT_EN, 0); -} - -static int clk_rcg2_shared_set_rate(struct clk_hw *hw, unsigned long rate, - unsigned long parent_rate) -{ - struct clk_rcg2 *rcg = to_clk_rcg2(hw); - - /* cache the rate */ - rcg->current_freq = rate; - - if (!__clk_is_enabled(hw->clk)) - return 0; - - return clk_rcg2_shared_force_enable(hw, rcg->current_freq); -} - -static unsigned long -clk_rcg2_shared_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) -{ - struct clk_rcg2 *rcg = to_clk_rcg2(hw); - - return rcg->current_freq = clk_rcg2_recalc_rate(hw, parent_rate); -} - -static int clk_rcg2_shared_enable(struct clk_hw *hw) -{ - struct clk_rcg2 *rcg = to_clk_rcg2(hw); - - return clk_rcg2_shared_force_enable(hw, rcg->current_freq); -} - -static void clk_rcg2_shared_disable(struct clk_hw *hw) -{ - struct clk_rcg2 *rcg = to_clk_rcg2(hw); - - /* switch to XO, which is the lowest entry in the freq table */ - clk_rcg2_shared_set_rate(hw, rcg->freq_tbl[0].freq, 0); -} - -const struct clk_ops clk_rcg2_shared_ops = { - .enable = clk_rcg2_shared_enable, - .disable = clk_rcg2_shared_disable, - .get_parent = clk_rcg2_get_parent, - .recalc_rate = clk_rcg2_shared_recalc_rate, - .determine_rate = clk_rcg2_determine_rate, - .set_rate = clk_rcg2_shared_set_rate, -}; -EXPORT_SYMBOL_GPL(clk_rcg2_shared_ops); - struct frac_entry { int num; int den;