From patchwork Sat Jun 12 12:08:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajeev Nandan X-Patchwork-Id: 459206 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3170FC49EAF for ; Sat, 12 Jun 2021 12:09:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 19EA7613AA for ; Sat, 12 Jun 2021 12:09:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231309AbhFLMLN (ORCPT ); Sat, 12 Jun 2021 08:11:13 -0400 Received: from alexa-out.qualcomm.com ([129.46.98.28]:29154 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231284AbhFLMLK (ORCPT ); Sat, 12 Jun 2021 08:11:10 -0400 Received: from ironmsg08-lv.qualcomm.com ([10.47.202.152]) by alexa-out.qualcomm.com with ESMTP; 12 Jun 2021 05:09:11 -0700 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg08-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 12 Jun 2021 05:09:10 -0700 X-QCInternal: smtphost Received: from rajeevny-linux.qualcomm.com ([10.204.66.121]) by ironmsg02-blr.qualcomm.com with ESMTP; 12 Jun 2021 17:38:45 +0530 Received: by rajeevny-linux.qualcomm.com (Postfix, from userid 2363605) id 8112021465; Sat, 12 Jun 2021 17:38:44 +0530 (IST) From: Rajeev Nandan To: dri-devel@lists.freedesktop.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Cc: Rajeev Nandan , linux-kernel@vger.kernel.org, thierry.reding@gmail.com, sam@ravnborg.org, robdclark@gmail.com, dianders@chromium.org, lyude@redhat.com, jani.nikula@intel.com, robh@kernel.org, laurent.pinchart@ideasonboard.com, a.hajda@samsung.com, daniel.thompson@linaro.org, hoegsberg@chromium.org, abhinavk@codeaurora.org, seanpaul@chromium.org, kalyan_t@codeaurora.org, mkrishn@codeaurora.org Subject: [v6 5/5] drm/panel-simple: Add Samsung ATNA33XC20 Date: Sat, 12 Jun 2021 17:38:02 +0530 Message-Id: <1623499682-2140-6-git-send-email-rajeevny@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1623499682-2140-1-git-send-email-rajeevny@codeaurora.org> References: <1623499682-2140-1-git-send-email-rajeevny@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add Samsung 13.3" FHD eDP AMOLED panel. Signed-off-by: Rajeev Nandan Reviewed-by: Douglas Anderson --- (no changes since v5) Changes in v4: - New Changes in v5: - Remove "uses_dpcd_backlight" property, not required now. (Douglas) drivers/gpu/drm/panel/panel-simple.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 86e5a45..23242fc 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -3562,6 +3562,36 @@ static const struct panel_desc rocktech_rk101ii01d_ct = { .connector_type = DRM_MODE_CONNECTOR_LVDS, }; +static const struct drm_display_mode samsung_atna33xc20_mode = { + .clock = 138770, + .hdisplay = 1920, + .hsync_start = 1920 + 48, + .hsync_end = 1920 + 48 + 32, + .htotal = 1920 + 48 + 32 + 80, + .vdisplay = 1080, + .vsync_start = 1080 + 8, + .vsync_end = 1080 + 8 + 8, + .vtotal = 1080 + 8 + 8 + 16, + .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, +}; + +static const struct panel_desc samsung_atna33xc20 = { + .modes = &samsung_atna33xc20_mode, + .num_modes = 1, + .bpc = 10, + .size = { + .width = 294, + .height = 165, + }, + .delay = { + .disable_to_power_off = 150, + .power_to_enable = 150, + .hpd_absent_delay = 200, + .unprepare = 500, + }, + .connector_type = DRM_MODE_CONNECTOR_eDP, +}; + static const struct drm_display_mode samsung_lsn122dl01_c01_mode = { .clock = 271560, .hdisplay = 2560, @@ -4563,6 +4593,9 @@ static const struct of_device_id platform_of_match[] = { .compatible = "rocktech,rk101ii01d-ct", .data = &rocktech_rk101ii01d_ct, }, { + .compatible = "samsung,atna33xc20", + .data = &samsung_atna33xc20, + }, { .compatible = "samsung,lsn122dl01-c01", .data = &samsung_lsn122dl01_c01, }, {