From patchwork Mon Mar 1 16:25:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 388643 Delivered-To: patch@linaro.org Received: by 2002:a02:290e:0:0:0:0:0 with SMTP id p14csp3485261jap; Mon, 1 Mar 2021 08:20:03 -0800 (PST) X-Google-Smtp-Source: ABdhPJxRtktLfD3B2LnizbwoQacz4vObZH8AaApMQ4UYmRBeiIz531VfuM2RUlRi5nxFye6kCC2L X-Received: by 2002:a17:906:f896:: with SMTP id lg22mr16220193ejb.124.1614615603717; Mon, 01 Mar 2021 08:20:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614615603; cv=none; d=google.com; s=arc-20160816; b=ijMMjCQcaaR+NtthAyhjJRo8K3+CKAon0j7CfB7v/yx/erIWNGKCKhsvRRJM8ifcf3 9i7AUWVVMGbb7Q+NsH5+LMg4RB6/L2ez81ITxoBS4BFkH3Q9eC+AQ144YSoXfEcgfG8R sh/91ob7HZq8maU+OZPU+f7Du/i2fn8OSOY/ovY2Z6K4NJWOKxre42MjvJooqb4UajIB kxaqBgEdXLC0iI12tlmLaGFiX8iyRqUIxn0pBkCXMGXAk4ZQ3lfG5V6/3L4r+/PptYy5 VR4qLW4h9zRoC0zdmCMquFxBkW7Nh/y78y4vkZwq1qtBbD9IZ4JlV+z+gF8H48E8BEvE yeUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:message-id:date:subject:cc:to:from :dkim-signature; bh=vaQb7S7VE33lCI9REO8er+62IGQEtBq+HCe1GdHTW2Q=; b=pU+HyG7UPixpjmZwKUAUmsJ3gqIFfINx744MtAgzGthAFNJSuywVNApRERncIB1kUL tGk+SZETG6vuzyBabiVIz8bANu8YLiktc0wPBLLKA2F3REude+Ev+dzvWP/tgf9yneye CtjRJ1R+osi7c+fJnrodmyBA6Wlev3a0kpEFPhqy1Lz1FT+M8VObB9z/JACblvMeLw6m 4AgIkILdoR0hrgISkDBmZg6Q1LFUDrVLRFWtoHuZOp+QTQugo9OeyU6d0ymDtvDqACyX WlA0maibtsrsY2i2T7YqzqlFKk3DmIw+lHs9wMFRiQLwUlzCYvNtUtnEsnDT9RtAuovy zsRQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iCiWAkcu; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id b24si3522385edr.415.2021.03.01.08.20.03; Mon, 01 Mar 2021 08:20:03 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iCiWAkcu; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237703AbhCAQSo (ORCPT + 16 others); Mon, 1 Mar 2021 11:18:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34296 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237620AbhCAQRq (ORCPT ); Mon, 1 Mar 2021 11:17:46 -0500 Received: from mail-wr1-x42c.google.com (mail-wr1-x42c.google.com [IPv6:2a00:1450:4864:20::42c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6FC7CC061756 for ; Mon, 1 Mar 2021 08:16:59 -0800 (PST) Received: by mail-wr1-x42c.google.com with SMTP id n4so16786582wrx.1 for ; Mon, 01 Mar 2021 08:16:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=vaQb7S7VE33lCI9REO8er+62IGQEtBq+HCe1GdHTW2Q=; b=iCiWAkcuYHDNc6+4whGvEdBgSekAIeuNVCFXT5tFks48JfgS8ew1fyMNss/HjoVnkS iTXiT4Wqg08i/b3fNKqMUiOSlC0jm/SigjF9btXJjxryv83u5hyI7/OfZrbuDLqHBmo4 5iUUHKlYW1EzYiJkLMRMeQis1jWiYVu+D0F8DOKSCwlwA2/yDX4SWF/osyic6w/hSXSC luJ/8takMKvrlDeoli9iNK9V/n3emYWEzbH9az0GNRy5XrG8GqBT2l8egl1S18NoPJxV RjHWMEoDmm1Jo604XR2pOdcnYHn7p14vJMlCgm+xzuecb2A6f/szXYbRQkCwh3w8ei+u VN3w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=vaQb7S7VE33lCI9REO8er+62IGQEtBq+HCe1GdHTW2Q=; b=qKpjWvBHOavMuAUSEVfL30iYWgS1HOdzePom/Mq4jmSaibOhEmqYs3cubcqm/ltleW WgIdF1CrwJraRxtMTEVLDiWJIxxnRlxsibi85ab2TD4QcVhdFiKq8pb5ESBQOPbAncIj eZf48pim+ypPqEVuAwxTeerFwElt1wGtjGqGP/bcyeNuCdcYnqfrvR08tR2ZKi+wC3lV b244B+pfl3pvhPLJ9kETWia9asVEAzLwr8DRX9IY8mXi+R3s+Wp0wto38MXdbHKAeyh5 og+rhWOEiNBwi0JYzGGlscMSDx2lUaqQZg4WNY8eo52R2sb+iLoY1jj/c93SpfBwOhIN 6glw== X-Gm-Message-State: AOAM531c1gcdKd5L584TLDg7978eYC1jHN4JOCYokjNloZ79PYnG5ElE GAIvuKT9L0N1mrTFjW/eFBUqew== X-Received: by 2002:a5d:5050:: with SMTP id h16mr17299474wrt.186.1614615418028; Mon, 01 Mar 2021 08:16:58 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:82c:5f0:5a20:c00c:6ec3:cc84]) by smtp.gmail.com with ESMTPSA id w6sm3919789wrl.49.2021.03.01.08.16.57 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 01 Mar 2021 08:16:57 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, Loic Poulain Subject: [PATCH 1/6] mhi: pci_generic: Parametrable element count for events Date: Mon, 1 Mar 2021 17:25:06 +0100 Message-Id: <1614615911-18794-1-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Not all hardwares need to use the same number of event ring elements. This change makes this parametrable. Signed-off-by: Loic Poulain --- drivers/bus/mhi/pci_generic.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) -- 2.7.4 Reviewed-by: Manivannan Sadhasivam diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 8187fcf..c58bf96 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -71,9 +71,9 @@ struct mhi_pci_dev_info { .doorbell_mode_switch = false, \ } -#define MHI_EVENT_CONFIG_CTRL(ev_ring) \ +#define MHI_EVENT_CONFIG_CTRL(ev_ring, el_count) \ { \ - .num_elements = 64, \ + .num_elements = el_count, \ .irq_moderation_ms = 0, \ .irq = (ev_ring) + 1, \ .priority = 1, \ @@ -114,9 +114,9 @@ struct mhi_pci_dev_info { .doorbell_mode_switch = true, \ } -#define MHI_EVENT_CONFIG_DATA(ev_ring) \ +#define MHI_EVENT_CONFIG_DATA(ev_ring, el_count) \ { \ - .num_elements = 128, \ + .num_elements = el_count, \ .irq_moderation_ms = 5, \ .irq = (ev_ring) + 1, \ .priority = 1, \ @@ -127,9 +127,9 @@ struct mhi_pci_dev_info { .offload_channel = false, \ } -#define MHI_EVENT_CONFIG_HW_DATA(ev_ring, ch_num) \ +#define MHI_EVENT_CONFIG_HW_DATA(ev_ring, el_count, ch_num) \ { \ - .num_elements = 2048, \ + .num_elements = el_count, \ .irq_moderation_ms = 1, \ .irq = (ev_ring) + 1, \ .priority = 1, \ @@ -156,12 +156,12 @@ static const struct mhi_channel_config modem_qcom_v1_mhi_channels[] = { static struct mhi_event_config modem_qcom_v1_mhi_events[] = { /* first ring is control+data ring */ - MHI_EVENT_CONFIG_CTRL(0), + MHI_EVENT_CONFIG_CTRL(0, 64), /* DIAG dedicated event ring */ - MHI_EVENT_CONFIG_DATA(1), + MHI_EVENT_CONFIG_DATA(1, 128), /* Hardware channels request dedicated hardware event rings */ - MHI_EVENT_CONFIG_HW_DATA(2, 100), - MHI_EVENT_CONFIG_HW_DATA(3, 101) + MHI_EVENT_CONFIG_HW_DATA(2, 1024, 100), + MHI_EVENT_CONFIG_HW_DATA(3, 2048, 101) }; static struct mhi_controller_config modem_qcom_v1_mhiv_config = {