From patchwork Fri Nov 27 12:49:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akhil P Oommen X-Patchwork-Id: 333664 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8CCE6C64E7D for ; Fri, 27 Nov 2020 12:50:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 48E4122248 for ; Fri, 27 Nov 2020 12:50:55 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mg.codeaurora.org header.i=@mg.codeaurora.org header.b="vaFq3my+" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729478AbgK0Muq (ORCPT ); Fri, 27 Nov 2020 07:50:46 -0500 Received: from z5.mailgun.us ([104.130.96.5]:33390 "EHLO z5.mailgun.us" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729715AbgK0Mup (ORCPT ); Fri, 27 Nov 2020 07:50:45 -0500 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1606481445; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=2PAw26K/OfSry2sZxoAdQsyFJ3xOhHE5b2DQ2851Idk=; b=vaFq3my+zpUpvJt5fcJT+3H6nixhmqhFcGitWLmz2ZgtPwbXocRC9g7ToLcjduEZ4P85IjjZ UvsJ5EO12MbnjbpGb5c/CCEDpDOIK5C5rnwva2PSpmtTl7RHGgQSlfxOUltTRunqIcJRUQmM vdLywWN0nFK9Dfkfg8NaXR5xzbg= X-Mailgun-Sending-Ip: 104.130.96.5 X-Mailgun-Sid: WyI1MzIzYiIsICJsaW51eC1hcm0tbXNtQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n01.prod.us-east-1.postgun.com with SMTP id 5fc0f61eba50d14f88969676 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Fri, 27 Nov 2020 12:50:38 GMT Sender: akhilpo=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 55600C433ED; Fri, 27 Nov 2020 12:50:37 +0000 (UTC) Received: from akhilpo-linux.qualcomm.com (unknown [202.46.22.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: akhilpo) by smtp.codeaurora.org (Postfix) with ESMTPSA id D2BB4C43460; Fri, 27 Nov 2020 12:50:33 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org D2BB4C43460 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=akhilpo@codeaurora.org From: Akhil P Oommen To: freedreno@lists.freedesktop.org, devicetree@vger.kernel.org Cc: robh@kernel.org, dri-devel@freedesktop.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, jcrouse@codeaurora.org, mka@chromium.org, robdclark@gmail.com, dianders@chromium.org Subject: [PATCH v2 2/3] drm/msm: Add speed-bin support for a618 gpu Date: Fri, 27 Nov 2020 18:19:45 +0530 Message-Id: <1606481386-22867-2-git-send-email-akhilpo@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1606481386-22867-1-git-send-email-akhilpo@codeaurora.org> References: <1606481386-22867-1-git-send-email-akhilpo@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Extend speed-bin support to a618 gpu. Signed-off-by: Akhil P Oommen --- drivers/gpu/drm/msm/adreno/adreno_device.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c index e0ff16c..21db7ae 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_device.c +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c @@ -18,6 +18,7 @@ bool snapshot_debugbus = false; MODULE_PARM_DESC(snapshot_debugbus, "Include debugbus sections in GPU devcoredump (if not fused off)"); module_param_named(snapshot_debugbus, snapshot_debugbus, bool, 0600); +const u32 a618_speedbins[] = {0, 169, 174}; const u32 a530v2_speedbins[] = {0, 1, 2, 3, 4, 5, 6, 7}; static const struct adreno_info gpulist[] = { @@ -196,6 +197,8 @@ static const struct adreno_info gpulist[] = { .gmem = SZ_512K, .inactive_period = DRM_MSM_INACTIVE_PERIOD, .init = a6xx_gpu_init, + .speedbins = a618_speedbins, + .speedbins_count = ARRAY_SIZE(a618_speedbins), }, { .rev = ADRENO_REV(6, 3, 0, ANY_ID), .revn = 630,