From patchwork Fri Nov 13 14:59:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 324326 Delivered-To: patch@linaro.org Received: by 2002:a05:6e02:5ce:0:0:0:0 with SMTP id l14csp1262167ils; Fri, 13 Nov 2020 06:53:34 -0800 (PST) X-Google-Smtp-Source: ABdhPJzddk4uDwI8O5tPEiT8KzuYxYPro4Ou+zThGo6p6LAt25X1dkZHb17YT361jXK5IGoJGlM6 X-Received: by 2002:a05:6402:a57:: with SMTP id bt23mr2696860edb.62.1605279214273; Fri, 13 Nov 2020 06:53:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1605279214; cv=none; d=google.com; s=arc-20160816; b=UVd0BVUXRtHUUkK8aj8h0dQxntuEUDSHDT52pRx+qom5gwGqRqSU7Im4JCQkD1J7mB XcMpysDCRnNJqzL5kI9asn76+N9HwQI6oJQUFrfqKPDsjvjW+cLNOEmDIECZ8Y45w+9G hkXpVL0RJ7SvjbHwA1fMQWGWhuglKobpl66C78uGhSLYd3AAVJ+0CFrdcD9WsH8xQcOj JwV+yTcAUAa0ZjkJyOZC7gFz/NACkwM/8us2YpfxvkpLhzCbKO34e+C8Yl8mY1gU6zJp 72+48cMDN+zSfRh6nJDdA0TFn6eOlEpea+JPBgaEA6SdRQGRo004u5IVhf5mX929dHY5 zC3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=NI5nyGOY3ERNyQJVul1TRTO9hhACB1gWUuV76MrEk5M=; b=wMspzVjugkT5smjIXr62sV2jip0stLvAvSa4kyGTCRpHRQT9EyTREYSWcB+Zgm9x13 MmwnBx6Fq1oH5nIOrVa73xXVVkKrLMbAcsml/PM1LSPn5mbfBsprgYyvz5KrDkFIbvHX dbrEFp/iq66547j9cKITtxc8YqjkYdbb8MJjhVpn1Hvu17bOywvL7Wl5LQQLG+zZFdXH 1LAlcnEQPHERfKdFWhM3chocZSpnfGyStnR6m+RHdrAN79bNBsnrlu9geoVeXQzaHviQ O7CUN5cgQK4EBGewvyM3bEbVYK/r3W3cFYYeHScqvQpJ2VfaSxeT/NyimYhxplWPpTtO 9HPw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Z3MUAw2x; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id g20si6410654edv.323.2020.11.13.06.53.33; Fri, 13 Nov 2020 06:53:34 -0800 (PST) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Z3MUAw2x; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726753AbgKMOxd (ORCPT + 15 others); Fri, 13 Nov 2020 09:53:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34360 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726267AbgKMOxc (ORCPT ); Fri, 13 Nov 2020 09:53:32 -0500 Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 65631C0613D1 for ; Fri, 13 Nov 2020 06:53:32 -0800 (PST) Received: by mail-wr1-x443.google.com with SMTP id k2so10246033wrx.2 for ; Fri, 13 Nov 2020 06:53:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=NI5nyGOY3ERNyQJVul1TRTO9hhACB1gWUuV76MrEk5M=; b=Z3MUAw2xhM2gTDaUJarLc7ChotsoJBmDgr19IbQ5UltyPFuj0eGRESVfzYgPWKEjZt pouXNebUI/qLKNblrEdAzyyCTwzUBA9xn/OwMPG43sODRJJPoPF7+41kQz6aQVl8pUWi kxYcvdexbHkOAcZSIep0GMhle3ZHXFZdurbVkTBKYvAVOO0xTjLnsIDu4j55mIFRPC7p grHHGXyucXQAcKGQC2qXsWzzrxGXJj4rPNaJGMVzR/3OrY7C0qfEmJgYdc5SMNbidjnF uBWehNvxZxnHHKO5yRFpXd8M1KDvDSKPXX8ZLl+8tnh2aHhVLdwmtg3hNV6h2MQ40DvG C0+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=NI5nyGOY3ERNyQJVul1TRTO9hhACB1gWUuV76MrEk5M=; b=M441Cb1hV8cJlciEtTsvi9vxWCBHhTOxxhDbX7u0oZsj4pmqpBP5QhkeE+/vXTjPMn OsXJOGbzzNRr8b4Cdazv772WtTRVI3KLd2Lps+4V5+PiadSZLvRiNEQuHe6sBhX6cIxK rzEBWYoSwYJJaba7xBH1r8yCYOMnFeGKU3VEMxaPs2ublxNcVWOQuo2uWNsFGD2zdzXs bN4mqyTZkVzP5EVASFrDm9yBN6aHcmGbxrSfZLOqpJtmTUGZ/0AziSK5nwPggBAFpo85 /HbkrcIrGzDn57ND8rvbyEVnjuehLeyk8gKlNeV03EuUVIwLHNtqaYk24h3mt8S4kYus B6Vg== X-Gm-Message-State: AOAM533F3DU4tEpzwZGfCvJYIOWKKFBviLrKVeNoyG3f5gL0xSl5kgN3 PjGznoX5Rz7z+sp5qdrPVImYYQ== X-Received: by 2002:adf:e506:: with SMTP id j6mr3868283wrm.411.1605279211089; Fri, 13 Nov 2020 06:53:31 -0800 (PST) Received: from localhost.localdomain ([2a01:e0a:490:8730:304f:e9d4:6385:8ac5]) by smtp.gmail.com with ESMTPSA id i6sm10729341wma.42.2020.11.13.06.53.29 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 13 Nov 2020 06:53:30 -0800 (PST) From: Loic Poulain To: manivannan.sadhasivam@linaro.org, hemantk@codeaurora.org Cc: linux-arm-msm@vger.kernel.org, Loic Poulain Subject: [PATCH 2/8] mhi: pci-generic: Perform hard reset on remove Date: Fri, 13 Nov 2020 15:59:56 +0100 Message-Id: <1605279602-18749-3-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1605279602-18749-1-git-send-email-loic.poulain@linaro.org> References: <1605279602-18749-1-git-send-email-loic.poulain@linaro.org> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Ensure that the device is hard-reset on remove to restore its initial state and avoid further issues on subsequent probe. This has been tested with Telit FN980m module. Signed-off-by: Loic Poulain --- drivers/bus/mhi/pci_generic.c | 11 +++++++++++ 1 file changed, 11 insertions(+) -- 2.7.4 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 13a7e4f..09c6b26 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -15,6 +15,8 @@ #define MHI_PCI_DEFAULT_BAR_NUM 0 +#define DEV_RESET_REG (0xB0) + /** * struct mhi_pci_dev_info - MHI PCI device specific information * @config: MHI controller configuration @@ -166,6 +168,11 @@ static void mhi_pci_status_cb(struct mhi_controller *mhi_cntrl, /* Nothing to do for now */ } +static inline void mhi_pci_reset(struct mhi_controller *mhi_cntrl) +{ + writel(1, mhi_cntrl->regs + DEV_RESET_REG); +} + static int mhi_pci_claim(struct mhi_controller *mhi_cntrl, unsigned int bar_num, u64 dma_mask) { @@ -329,6 +336,10 @@ static void mhi_pci_remove(struct pci_dev *pdev) mhi_power_down(mhi_cntrl, true); mhi_unprepare_after_power_down(mhi_cntrl); mhi_unregister_controller(mhi_cntrl); + + /* MHI-layer reset could not be enough, always hard-reset the device */ + mhi_pci_reset(mhi_cntrl); + mhi_free_controller(mhi_cntrl); }